Query: ARM Cortex A9: Is invalidating L1 data cache mandatory before usage

[Shiraz HASHIM]

Hello,

I am trying to port Linux on ARM Cortex A9 based platform and what
I see is that if I don't invalidate the data cache before enabling
and using it (in arch/arm/boot/compressed/head.S) the system crashes.

I need to do the same for second core before calling secondary_startup.

Is it normal? Why then other platforms (cortex A9 based) are not doing
this. What am I missing?

thanks for your help.

regards
Shira