[PATCH] ARM: Add SWP/SWPB emulation for ARMv7 processors

Woodruff, Richard r-woodruff2 at ti.com
Thu Dec 17 15:43:22 EST 2009


> From: Jamie Lokier [mailto:jamie at shareable.org]
> Sent: Thursday, December 17, 2009 1:16 PM

> Woodruff, Richard wrote:
> > Exclusive operations are more certainly more efficient than the full
> > bus lock behavior of SWP.  Finding and killing SWP where possible
> > seems positive.
>
> Are they really more efficient for cached accesses in L1?  In
> principle, external bus lock is not needed when doing an
> read-modify-write on words in MESI cache, just the ability to
> internally block it's eviction during the sequence.

Performance point was mainly about coordination with non-coherent external masters (outside of cluster).  Blocking all external people for a small range is not optimal.

Within the cluster and in cache as you point out... I'm not sure of implementation reality. The outside world past A9 may or may not export some form of mesi.

Regards,
Richard W.




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