[PATCH RFC v4 1/4] media: dt-bindings: Add Amlogic V4L2 video decoder

[Krzysztof Kozlowski]

On 13/02/2026 12:14, Piotr Oniszczuk wrote:
>>
>>>>> In short, canvas is a hardware IP inside the Amlogic SoC. The decoder IP
>>>>> needs to access DDR through canvas IP, so we need to reference the
>>>> Why decoder cannot access DDR directly?
>>> The internal topology of the S4 chip is designed this way, we don't know 
>>> why our VLSI colleauges designed like this. But similar designs have 
>>> been removed in subsequent chips, eliminating the need to rely on a 
>>> common hardware IP.
>>
>> Quite poor explanation. Based on this, this as well could be entry in
>> device reg lists.
>>
>> Anyway, I am done guessing, explain properly the hardware instead of
>> answering with half-baked responses just so I will go away.
>>
>>
>> Best regards,
>> Krzysztof
>>
> 
> Krzysztof,
> 
> May you pls explain me: what added value - to upstreaming aml video decoder - will be provided by giving NAK .... because canvas/DDR access details explanations are not enough detailed FOR YOU?

NAK is a disagreement with this patch being merged, so there is no added
value in it. What sort of added value do you expect from NAKs?

Best regards,
Krzysztof