[PATCH RFC v4 1/4] media: dt-bindings: Add Amlogic V4L2 video decoder
Zhentao Guo
zhentao.guo at amlogic.com
Fri Feb 13 00:04:46 PST 2026
在 2026/2/13 15:35, Krzysztof Kozlowski 写道:
> [ EXTERNAL EMAIL ]
>
> On 13/02/2026 06:12, Zhentao Guo via B4 Relay wrote:
>> From: Zhentao Guo <zhentao.guo at amlogic.com>
>>
>> Describe the initial support for the V4L2 stateless video decoder
>> driver used with the Amlogic S4 (S805X2) platform.
>>
>> Signed-off-by: Zhentao Guo <zhentao.guo at amlogic.com>
>> ---
>> .../bindings/media/amlogic,s4-vcodec-dec.yaml | 96 ++++++++++++++++++++++
>> 1 file changed, 96 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/media/amlogic,s4-vcodec-dec.yaml b/Documentation/devicetree/bindings/media/amlogic,s4-vcodec-dec.yaml
>> new file mode 100644
>> index 000000000000..88780514d06c
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/media/amlogic,s4-vcodec-dec.yaml
>> @@ -0,0 +1,96 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +# Copyright (C) 2025 Amlogic, Inc. All rights reserved
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/media/amlogic,s4-vcodec-dec.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Amlogic Video Decode Accelerator
>> +
>> +maintainers:
>> + - Zhentao Guo <zhentao.guo at amlogic.com>
>> +
>> +description:
>> + The Video Decoder Accelerator present on Amlogic SOCs.
>> + It supports stateless h264 decoding.
>> +
>> +properties:
>> + compatible:
>> + const: amlogic,s4-vcodec-dec
> Why do you repeat "dec" twice? codec means decoder, so what is the last
> "dec" about?
In fact, codec means encoder+decoder, and dec is short for decoder.
>> +
>> + reg:
>> + maxItems: 2
>> +
>> + reg-names:
>> + items:
>> + - const: dos
>> + - const: dmc
>> +
>> + interrupts:
>> + maxItems: 3
>> +
>> + clocks:
>> + maxItems: 3
>> +
>> + clock-names:
>> + items:
>> + - const: vdec
>> + - const: clk_vdec_mux
>> + - const: clk_hevcf_mux
> Name them based on their role/name in this device. Why this device would
> care that it receives a mux? Not a div? or not a gate?
Ok, previously we overlooked this. We will improve it in the next version.
>> +
>> + power-domains:
>> + maxItems: 2
>> +
>> + power-domain-names:
>> + items:
>> + - const: vdec
>> + - const: hevc
>> +
>> + resets:
>> + maxItems: 1
>> +
>> + amlogic,canvas:
>> + description: should point to a canvas provider node
> Why? What for?
>
> What is canvas provider?
The canvas provider is: drivers/soc/amlogic/meson-canvas.c
In short, canvas is a hardware IP inside the Amlogic SoC. The decoder IP
needs to access DDR through canvas IP, so we need to reference the
canvas driver.
>> + $ref: /schemas/types.yaml#/definitions/phandle
>> +
>> +required:
>> + - compatible
>> + - reg
>> + - reg-names
>> + - interrupts
>> + - clocks
>> + - clock-names
>> + - power-domains
>> + - power-domain-names
>> +
> Best regards,
> Krzysztof
BRs
Zhentao
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