[PATCH v4 7/8] arm64: dts: amlogic: A5: Add PLL controller node
Chuan Liu via B4 Relay
devnull+chuan.liu.amlogic.com at kernel.org
Tue Oct 28 02:52:33 PDT 2025
From: Chuan Liu <chuan.liu at amlogic.com>
Add PLL controller node for A5 SoC family.
Signed-off-by: Chuan Liu <chuan.liu at amlogic.com>
---
arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
index a6625508893d..70deeab220e0 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
+++ b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/pinctrl/amlogic,pinctrl.h>
#include <dt-bindings/power/amlogic,a5-pwrc.h>
#include <dt-bindings/clock/amlogic,a5-scmi-clkc.h>
+#include <dt-bindings/clock/amlogic,a5-pll-clkc.h>
/ {
cpus {
@@ -187,4 +188,16 @@ gpio_intc: interrupt-controller at 4080 {
amlogic,channel-interrupts =
<10 11 12 13 14 15 16 17 18 19 20 21>;
};
+
+ clkc_pll: clock-controller at 8000 {
+ compatible = "amlogic,a5-pll-clkc";
+ reg = <0x0 0x8000 0x0 0x1a4>;
+ #clock-cells = <1>;
+ clocks = <&xtal>,
+ <&scmi_clk CLKID_FIXED_PLL_DCO>,
+ <&scmi_clk CLKID_FIXED_PLL>;
+ clock-names = "xtal",
+ "fix_dco",
+ "fix";
+ };
};
--
2.42.0
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