ioread/write problem

Holger Schurig hs4233 at
Mon Mar 17 04:22:47 EDT 2008

> So I'm sure this quite the right forum to ask this, but maybe
> someone here has some ideas which might help me.  In bringing
> up my mv8385 CF module, I've had to update the ioread/write
> functions in if_cs.c to include a udelay(1) between ALL
> ioread/write/rep calls.

The right forum would be the mailing-list for your processor's 
architecture. E.g. if you have an ARM bases processor (this 
includes Intel XScale, Marvell XScale, some Samsungs etc), go to 
the mailing list at

The udelay(1) is ugly, probably a WMB() (write memory barrier) is 

It might even be a hardware problem --- or a setup problem of the 
memory controller. E.g. on Intel PXA 2xx, which I happen to 
know, you have various extra registers that tune delays and pin 
functions for the PCMCIA interface. Those registers are 
different to the normal memory-mapped I/O devices.

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