[LEDE-DEV] [PATCH 2/3] ramips-mt7621: add GPIO-config for Ubiquiti-EdgeRouterX(-SFP)

[Sven Roederer]

I just gave it another try, as I like the idea of having it in the DTS. As my test ERX is gone I continue testing on ERX-SFP.
Please se below ...

On Sonntag, 14. Mai 2017 16:24:15 CEST Mathias Kresin wrote:
> >> 
> >> If you use the gpio-export node in the device tree source file, the gpio
> >> pin should appear at /sys/class/gpio/. Most likely you have done
> >> something wrong. Could it be that you used exactly the same gpio pin
> >> number as you have it in your 03_gpio_export file? You need to decrement
> >> the gpio pin number by the gpio base as it is done for all gpios in the
> >> dts.
> >> 
> > for the "gpio in dts" I used this branch
> > https://github.com/SvenRoederer/lede-project-source/commits/ERX-SFP_gpio-
> > in-dts --> see the last 2 commits. Code only changed for ERX for this
> > test.
> > Did I miss something?
> 
> Yes you did. The gpio-export,output value is wrong. It has to be either
> 0 or 1, similar to the values set for the gpio_switch config in
> /e/c/system.
> 

I removed the 03_gpio_export and added this to the dts:
gpio_export {                                                                                                                
	compatible = "gpio-export";                                                                                          
	#size-cells = <0>;                                                                                                   

	poe_passthrough {                                                                                                    
	    gpio-export,name = "poe_power_port0";                                                                            
	    gpio-export,output = <1>;                                                                                        
	    gpios = <&gpio0 496 0>;                                                                                          
	};                                                                                                                   
};

But booting this kernel gives:
[    1.660000] ------------[ cut here ]------------
[    1.670000] WARNING: CPU: 0 PID: 1 at drivers/gpio/gpiolib.c:85 0x801dc2fc()
[    1.680000] invalid GPIO -22
[    1.690000] Modules linked in:
[    1.690000] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.4.61 #0
[    1.690000] Stack : 00000000 00000000 80566862 00000033 00000000 00000000 00000000 00000000
          00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
          00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
          00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
          00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
          ...
[    1.690000] Call Trace:[<800161e0>] 0x800161e0
[    1.690000] [<800161e0>] 0x800161e0
[    1.690000] [<801aba14>] 0x801aba14
[    1.690000] [<8002be68>] 0x8002be68
[    1.690000] [<8040c230>] 0x8040c230
[    1.690000] [<801dc2fc>] 0x801dc2fc
[    1.690000] [<8002bec4>] 0x8002bec4
[    1.690000] [<801dc2fc>] 0x801dc2fc
[    1.690000] [<801dac0c>] 0x801dac0c
[    1.690000] [<800c56f4>] 0x800c56f4
[    1.690000] [<801dd4c8>] 0x801dd4c8
[    1.690000] [<801dac0c>] 0x801dac0c
[    1.690000] [<80212d64>] 0x80212d64
[    1.690000] [<801dac74>] 0x801dac74
[    1.690000] [<80265fd8>] 0x80265fd8
[    1.690000] [<801dd960>] 0x801dd960
[    1.690000] [<8041edd8>] 0x8041edd8
[    1.690000] [<8040c230>] 0x8040c230
[    1.690000] [<8040c230>] 0x8040c230
[    1.690000] [<8040c230>] 0x8040c230
[    1.690000] [<80211848>] 0x80211848
[    1.690000] [<802668fc>] 0x802668fc
[    1.690000] [<801248f4>] 0x801248f4
[    1.690000] [<8020fe2c>] 0x8020fe2c
[    1.690000] [<80211b0c>] 0x80211b0c
[    1.690000] [<80210010>] 0x80210010
[    1.690000] [<8020e234>] 0x8020e234
[    1.690000] [<8020ff94>] 0x8020ff94
[    1.690000] [<8020e2f0>] 0x8020e2f0
[    1.690000] [<80367058>] 0x80367058
[    1.690000] [<8020e0c4>] 0x8020e0c4
[    1.690000] [<8020f524>] 0x8020f524
[    1.690000] [<80063328>] 0x80063328
[    1.690000] [<802105cc>] 0x802105cc
[    1.690000] [<80210760>] 0x80210760
[    1.690000] [<80180898>] 0x80180898
[    1.690000] [<8040c230>] 0x8040c230
[    1.690000] [<8041ec78>] 0x8041ec78
[    1.690000] [<80211948>] 0x80211948
[    1.690000] [<8041ec78>] 0x8041ec78
[    1.690000] [<8000f674>] 0x8000f674
[    1.690000] [<80118fe0>] 0x80118fe0
[    1.690000] [<80118de4>] 0x80118de4
[    1.690000] [<80043920>] 0x80043920
[    1.690000] [<8040cce8>] 0x8040cce8
[    1.690000] [<8040c230>] 0x8040c230
[    1.690000] [<80009ff4>] 0x80009ff4
[    1.690000] [<8000a004>] 0x8000a004
[    1.690000] [<80009ff4>] 0x80009ff4
[    1.690000] [<80005478>] 0x80005478
[    1.690000] 
[    2.120000] ---[ end trace ceab04cd8881362f ]---
[    2.130000] gpiod_request: invalid GPIO
[    2.140000] gpio-export gpio_export: 0 gpio(s) exported


I'm wondering on the "GPIO -22". Checking the source of drivers/gpio/gpiolib.c shows gpio is of type unsigned, large enough to handle gpio#496.

Any Idea what's going on?
Probably it's something related to the SoC-gpios and the additional pins defined from the pca9555
[    0.440000] mt7621_gpio 1e000600.gpio: registering 32 gpios
[    0.450000] mt7621_gpio 1e000600.gpio: registering 32 gpios
[    0.460000] mt7621_gpio 1e000600.gpio: registering 32 gpios