[PATCH 0/6] Add riscv tests to cover the base extension specs

Andrew Jones ajones at ventanamicro.com
Thu Feb 29 07:03:11 PST 2024


On Thu, Feb 29, 2024 at 03:12:43PM +0100, Carlos Maiolino wrote:
> On Thu, Feb 29, 2024 at 03:05:48PM +0100, Andrew Jones wrote:
> > On Thu, Feb 29, 2024 at 01:42:06PM +0100, cem at kernel.org wrote:
> > > From: Carlos Maiolino <cem at kernel.org>
> > >
> > > Hi,
> > >
> > > this is my first attempt to create tests to cover some functions of the riscv's
> > > SBI base implementation spec. The series also includes a couple helpers to
> > > reduce code duplication.
> > >
> > > Carlos Maiolino (6):
> > >   riscv: Add test to probe SBI Extension
> > >   riscv: Factor out environment variable check
> > >   riscv: Implement test for architecture ID register
> > >   riscv: Enable gen_report() to print the wrong value in case of test
> > >     failure
> > >   riscv: Test for specific SBI implementation ID
> > >   riscv: Test for a SBI implementation ID range
> > >
> > >  riscv/sbi.c | 95 ++++++++++++++++++++++++++++++++++++++++++++++-------
> > >  1 file changed, 83 insertions(+), 12 deletions(-)
> > >
> > > --
> > > 2.43.2
> > 
> > Hi Carlos,
> > 
> > If you can, please CC tech-prs at lists.riscv.org when posting SBI tests.
> 
> Ok, will do, should I resend this series?

Might as well, or at least pick up the CC when posting v2.

Thanks,
drew



More information about the kvm-riscv mailing list