[PATCH v5 28/32] x86/mm, kexec: Allow kexec to be used with SME

[Tom Lendacky]

On 5/19/2017 4:28 PM, Borislav Petkov wrote:
> On Fri, May 19, 2017 at 04:07:24PM -0500, Tom Lendacky wrote:
>> As long as those never change from static inline everything will be
>> fine. I can change it, but I really like how it explicitly indicates
>
> I know what you want to do. But you're practically defining a helper
> which contains two arbitrary instructions which probably no one else
> will need.
>
> So how about we simplify this function even more. We don't need to pay
> attention to kexec being in progress because we're halting anyway so who
> cares how fast we halt.
>
> Might have to state that in the comment below though, instead of what's
> there now.
>
> And for the exact same moot reason, we don't need to look at SME CPUID
> feature - we can just as well WBINVD unconditionally.
>
> void stop_this_cpu(void *dummy)
> {
>         local_irq_disable();
>         /*
>          * Remove this CPU:
>          */
>         set_cpu_online(smp_processor_id(), false);
>         disable_local_APIC();
>         mcheck_cpu_clear(this_cpu_ptr(&cpu_info));
>
>         for (;;) {
>                 /*
>                  * If we are performing a kexec and the processor supports
>                  * SME then we need to clear out cache information before
>                  * halting. With kexec, going from SME inactive to SME active
>                  * requires clearing cache entries so that addresses without
>                  * the encryption bit set don't corrupt the same physical
>                  * address that has the encryption bit set when caches are
>                  * flushed. Perform a wbinvd followed by a halt to achieve
>                  * this.
>                  */
>                 asm volatile("wbinvd; hlt" ::: "memory");
>         }
> }
>
> How's that?

I can live with that!

Thanks,
Tom

>