[PATCH v2 7/9] mci: add PCI SDHCI controller support

[Sascha Hauer]

On 2026-06-29 10:51, Ahmad Fatoum wrote:
> Hello Sascha,
> 
> On 6/29/26 10:47 AM, Sascha Hauer wrote:
> > On 2026-06-26 18:19, Ahmad Fatoum wrote:
> >> QEMU can expose eMMC through the class-compliant sdhci-pci device, but
> >> barebox only had platform SDHCI glue. Add a PCI host driver that maps BAR0,
> >> enables bus mastering, initializes the SDHCI core and registers an MCI host.
> >>
> >> This is intentionally small and PIO-based, which is enough for the QEMU RPMB
> >> test environment while reusing the common SDHCI helpers.
> > 
> > Is this comment wrong? The driver depends on HAS_DMA and even calls
> > sdhci_setup_adma().
> 
> Yes, I had problems getting RPMB access to work with PIO and ADMA fixed
> that and I had not dug deeper.
> 
> Can you remove that paragraph when applying?
> >> index 4413fd1655aa..d6746fbec28f 100644
> >> --- a/drivers/mci/mci-core.c
> >> +++ b/drivers/mci/mci-core.c
> >> @@ -2942,7 +2942,7 @@ static struct device_node *mci_get_partition_node(struct device_node *hwnode,
> >>  	struct device_node *np;
> >>  	char partnodename[sizeof("bootx-partitions")];
> >>  
> >> -	if (index > 8)
> >> +	if (!hwnode || index > 8)
> >>  		return NULL;
> > 
> > Should this be an extra patch?
> 
> This is the first non-DT instantiated device and thus there is no DT
> node. I can split this off if you like. The rest of the file seems to
> handle non-existence of a DT node just fine.

Back in the old days non-DT instantiated devices were the normal case,
so 15cc1fa00c ("mci: parse upstream boot/gp partition binding") might
have introduced a regression, so I would prefer to have this as a
separate patch.

Sascha

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