[PATCH v2 11/21] mmu: add MAP_CACHED_RO mapping type

[Ahmad Fatoum]

On 1/6/26 1:53 PM, Sascha Hauer wrote:
> ARM32 and ARM64 have ARCH_MAP_CACHED_RO. We'll move parts of the MMU
> initialization to generic code later, so add a new mapping type to
> include/mmu.h.
> 
> Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>

Reviewed-by: Ahmad Fatoum <a.fatoum at pengutronix.de>

> ---
>  arch/arm/cpu/mmu-common.c | 4 ++--
>  arch/arm/cpu/mmu-common.h | 3 +--
>  arch/arm/cpu/mmu_32.c     | 4 ++--
>  arch/arm/cpu/mmu_64.c     | 2 +-
>  include/mmu.h             | 3 ++-
>  5 files changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/arch/arm/cpu/mmu-common.c b/arch/arm/cpu/mmu-common.c
> index a1431c0ff46112552d2919269cc8a7a66d7a20c1..67317f127cadb138cc2e85bb18c92ab47bc1206f 100644
> --- a/arch/arm/cpu/mmu-common.c
> +++ b/arch/arm/cpu/mmu-common.c
> @@ -22,7 +22,7 @@ const char *map_type_tostr(maptype_t map_type)
>  
>  	switch (map_type) {
>  	case ARCH_MAP_CACHED_RWX:	return "RWX";
> -	case ARCH_MAP_CACHED_RO:	return "RO";
> +	case MAP_CACHED_RO:		return "RO";
>  	case MAP_CACHED:		return "CACHED";
>  	case MAP_UNCACHED:		return "UNCACHED";
>  	case MAP_CODE:			return "CODE";
> @@ -158,7 +158,7 @@ static void mmu_remap_memory_banks(void)
>  	}
>  
>  	remap_range((void *)code_start, code_size, MAP_CODE);
> -	remap_range((void *)rodata_start, rodata_size, ARCH_MAP_CACHED_RO);
> +	remap_range((void *)rodata_start, rodata_size, MAP_CACHED_RO);
>  
>  	setup_trap_pages();
>  }
> diff --git a/arch/arm/cpu/mmu-common.h b/arch/arm/cpu/mmu-common.h
> index a111e15a21b479b5ffa2ea8973e2ad189e531925..b42c421ffde8ebba84b17c6311b735f7759dc69b 100644
> --- a/arch/arm/cpu/mmu-common.h
> +++ b/arch/arm/cpu/mmu-common.h
> @@ -12,7 +12,6 @@
>  #include <linux/bits.h>
>  
>  #define ARCH_MAP_CACHED_RWX	MAP_ARCH(2)
> -#define ARCH_MAP_CACHED_RO	MAP_ARCH(3)
>  
>  #define ARCH_MAP_FLAG_PAGEWISE	BIT(31)
>  
> @@ -32,7 +31,7 @@ static inline maptype_t arm_mmu_maybe_skip_permissions(maptype_t map_type)
>  	switch (map_type & MAP_TYPE_MASK) {
>  	case MAP_CODE:
>  	case MAP_CACHED:
> -	case ARCH_MAP_CACHED_RO:
> +	case MAP_CACHED_RO:
>  		return ARCH_MAP_CACHED_RWX;
>  	default:
>  		return map_type;
> diff --git a/arch/arm/cpu/mmu_32.c b/arch/arm/cpu/mmu_32.c
> index 912d14e8cf82afcfd1800e4e11503899e10ccbbc..71ead41c3d274548c9427c1ce9833de309114c4d 100644
> --- a/arch/arm/cpu/mmu_32.c
> +++ b/arch/arm/cpu/mmu_32.c
> @@ -304,7 +304,7 @@ static uint32_t get_pte_flags(maptype_t map_type)
>  		switch (map_type & MAP_TYPE_MASK) {
>  		case ARCH_MAP_CACHED_RWX:
>  			return PTE_FLAGS_CACHED_V7_RWX;
> -		case ARCH_MAP_CACHED_RO:
> +		case MAP_CACHED_RO:
>  			return PTE_FLAGS_CACHED_RO_V7;
>  		case MAP_CACHED:
>  			return PTE_FLAGS_CACHED_V7;
> @@ -320,7 +320,7 @@ static uint32_t get_pte_flags(maptype_t map_type)
>  		}
>  	} else {
>  		switch (map_type & MAP_TYPE_MASK) {
> -		case ARCH_MAP_CACHED_RO:
> +		case MAP_CACHED_RO:
>  		case MAP_CODE:
>  			return PTE_FLAGS_CACHED_RO_V4;
>  		case ARCH_MAP_CACHED_RWX:
> diff --git a/arch/arm/cpu/mmu_64.c b/arch/arm/cpu/mmu_64.c
> index 56c6a21f2b2a8d8300fd6dbfaaf36a54d264a0f3..ddf1373ec0a801baad043146187d7f4c3eac6a2a 100644
> --- a/arch/arm/cpu/mmu_64.c
> +++ b/arch/arm/cpu/mmu_64.c
> @@ -159,7 +159,7 @@ static unsigned long get_pte_attrs(maptype_t map_type)
>  		return attrs_xn() | MEM_ALLOC_WRITECOMBINE;
>  	case MAP_CODE:
>  		return CACHED_MEM | PTE_BLOCK_RO;
> -	case ARCH_MAP_CACHED_RO:
> +	case MAP_CACHED_RO:
>  		return attrs_xn() | CACHED_MEM | PTE_BLOCK_RO;
>  	case ARCH_MAP_CACHED_RWX:
>  		return CACHED_MEM;
> diff --git a/include/mmu.h b/include/mmu.h
> index f79619808829532ed05f018b982e4bc76bca72a4..9f582f25e1de14d47cfe2eff64f9cce81c4e492d 100644
> --- a/include/mmu.h
> +++ b/include/mmu.h
> @@ -9,9 +9,10 @@
>  #define MAP_CACHED		1
>  #define MAP_FAULT		2
>  #define MAP_CODE		3
> +#define MAP_CACHED_RO		4
>  
>  #ifdef CONFIG_ARCH_HAS_DMA_WRITE_COMBINE
> -#define MAP_WRITECOMBINE	4
> +#define MAP_WRITECOMBINE	5
>  #else
>  #define MAP_WRITECOMBINE	MAP_UNCACHED
>  #endif
> 

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