[PATCH 2/2] fixup! RISC-V: add 64-bit support

Ahmad Fatoum ahmad at a3f.at
Sun Mar 14 13:03:01 GMT 2021


We don't yet require support for float and atomic ops, so remove
their letter.

Suggested-by: Rouven Czerwinski <r.czerwinski at pengutronix.de>
Signed-off-by: Ahmad Fatoum <ahmad at a3f.at>
---
 arch/riscv/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
index 133e43af41bf..6df7d9d9eeac 100644
--- a/arch/riscv/Makefile
+++ b/arch/riscv/Makefile
@@ -6,7 +6,7 @@ ifeq ($(CONFIG_ARCH_RV32I),y)
 	riscv-cflags-y += -march=rv32im -mabi=ilp32
 	riscv-ldflags-y += -melf32lriscv
 else
-	riscv-cflags-y += -march=rv64imafd  -mabi=lp64
+	riscv-cflags-y += -march=rv64im  -mabi=lp64
 	riscv-ldflags-y += -melf64lriscv
 endif
 
-- 
2.30.0




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