[PATCH 7/7] fixup! phy: rockchip: Add naneng-combphy support

[Sascha Hauer]

---
 drivers/phy/rockchip/phy-rockchip-naneng-combphy.c | 9 +--------
 1 file changed, 1 insertion(+), 8 deletions(-)

diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
index a8d7fd13d8..af4340f90d 100644
--- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
+++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
@@ -401,17 +401,10 @@ static int rk3568_combphy_cfg(struct rockchip_combphy_priv *priv)
 	const struct rockchip_combphy_grfcfg *cfg = priv->cfg->grfcfg;
 	struct clk *refclk = NULL;
 	unsigned long rate;
-	int i;
 	u32 val;
 
 	/* Configure PHY reference clock frequency */
-	for (i = 0; i < priv->num_clks; i++) {
-		if (!strncmp(priv->clks[i].id, "refclk", 6)) {
-			refclk = priv->clks[i].clk;
-			break;
-		}
-	}
-
+	refclk = priv->clks[0].clk;
 	if (!refclk) {
 		dev_err(priv->dev, "No refclk found\n");
 		return -EINVAL;
-- 
2.29.2