[PATCH 2/2] ARM: i.MX: xload: consider ECC strength when reading page
trent.piepho at igorinstitute.com
Tue Jun 15 13:25:06 PDT 2021
On Tue, Jun 15, 2021 at 7:35 AM Sascha Hauer <sha at pengutronix.de> wrote:
> > I do not see any imx nand xloader users at all in mainlinux Barebox
> > codebase. Which is annoying, since I'm trying to boot barebox from
> > NAND on iMX6ULL and there are no boards in barebox that do this. So I
> > have to do it from scratch, even though I know such boards exist and
> > in fact you are using one.
> > Do I do not know of any specific imx6 boards that do this. As there
> > are apparently no imx boards booting barebox from nand....
> There are several i.MX6 boards mainline that support booting from NAND,
> one of them being the phyFLEX-i.MX6 board which I am using all day. It
> doesn't use any xload mechanism, theres's only one stage in NAND. We
> also have imx6_nand_start_image() which can be used when a xload
> mechanism is desired for cases when the SDRAM shall be initialized in
> code rather than using DCD data. This part indeed has no users in tree,
> but there shouldn't be much to implement to get this working.
That's the issue, this patch is to the code for xload, which has no in
The patch either doesn't matter, fixes, or breaks a board, depending
on what it did with NAND. A normal
NAND layout doesn't matter, but there are "wrong", or at least
non-standard, layouts that it will either fix or break.
Andrej has one real example where it fixes. There are no known
specific examples where it would break, but absence of evidence is not
evidence of absence!
If there was an in-tree board using xload gpmi, then one could also
look for a BSP software update system or published software update
instructions for that board, and see what they do.
For example, Variscite's DART-6UL instructions for u-boot update from
Linux in §5.4 of
These have both SPL + 2nd stage replacement in one block, which is
good and this patch will not break a board flashed this way.
Of course, SPL flash uses kobs-ng, which needs the debugfs bch hack
that's not in the mainline kernel, so maybe someone skips that step
and doesn't update SPL?
> > But consider that even if barebox spl can support two different BCH
> > configs on same nand device for booting, neither Barebox nor Linux
> > support this concept at all.
> At least the OMAP NAND driver in barebox supports different ECC configs
> that are switchable during runtime. The ECC scheme once switched is used
> for the whole device though, what's missing is indeed to attach an ECC
> scheme to a partition rather than to the whole device. I have that dream
> each time when hacking OMAP NAND...
Even if Barebox could do it, it won't work in Linux, which would be a
huge drawback. AFAIK, even the new dts based ECC properties are still
attached to a device and not a partition.
When hardware ECC first appeared, it seemed obvious to me that an mtd
ioctl to get/set ecc values was needed. kobs-ng needs this. The
thing I can't remember for the MXS boot system needed it. One could
have different ECC for different partitions. One could switch the ECC
used when reflashing a partition. But no, we have stuff like the
debugfs bch file that is still not mainlined after a decade.
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