[PATCH 01/10] Add initial RISC-V architecture support

[Sascha Hauer]

Hi Antony,

On Sun, Apr 15, 2018 at 02:28:49PM +0300, Antony Pavlov wrote:
> Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
> ---
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> new file mode 100644
> index 0000000000..d65e87acd8
> --- /dev/null
> +++ b/arch/riscv/Kconfig
> @@ -0,0 +1,62 @@
> +config RISCV
> +	def_bool y
> +	select GENERIC_FIND_NEXT_BIT
> +	select HAVE_CONFIGURABLE_MEMORY_LAYOUT
> +	select HAVE_CONFIGURABLE_TEXT_BASE
> +	select GPIOLIB
> +	select OFTREE
> +	select COMMON_CLK
> +	select COMMON_CLK_OF_PROVIDER
> +	select CLKDEV_LOOKUP
> +
> +config ARCH_TEXT_BASE
> +	hex
> +	default 0x0
> +
> +config GENERIC_LINKER_SCRIPT
> +	def_bool y

Do we need this? The linker script should be universal enough to be used
by all boards.

> diff --git a/arch/riscv/dts/skeleton.dtsi b/arch/riscv/dts/skeleton.dtsi
> new file mode 100644
> index 0000000000..38ead821bb
> --- /dev/null
> +++ b/arch/riscv/dts/skeleton.dtsi
> @@ -0,0 +1,13 @@
> +/*
> + * Skeleton device tree; the bare minimum needed to boot; just include and
> + * add a compatible value.  The bootloader will typically populate the memory
> + * node.
> + */
> +
> +/ {
> +	#address-cells = <2>;
> +	#size-cells = <1>;
> +	chosen { };
> +	aliases { };
> +	memory { device_type = "memory"; reg = <0 0 0>; };
> +};

skeleton.dtsi should no longer be used. For example we should now have
memory at adr {}; instead of memory {};. Since "adr" is board/SoC specific
we can't put it in a generic file.

> diff --git a/arch/riscv/lib/ashldi3.c b/arch/riscv/lib/ashldi3.c
> new file mode 100644
> index 0000000000..cbdbcbb6a9
> --- /dev/null
> +++ b/arch/riscv/lib/ashldi3.c
> @@ -0,0 +1,28 @@
> +#include <module.h>
> +
> +#include "libgcc.h"
> +
> +long long __ashldi3(long long u, word_type b)
> +{

Can we have generic C variants for these files? The Kernel has these
symbols in lib/ and they can be selected by "select GENERIC_ASHLDI3"

Sascha

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