[PATCH 2/3] ARM: i.MX6: fix clock gating

[Jan Luebbe]

Since ce6755ca1c41b8dd3b40cf3c9d6f3a1237a92720, both IPU and OpenVG are
enabled if CONFIG_DRIVER_VIDEO_IMX_IPUV3 is true, but in the other case,
only OpenVG was disabled.

Signed-off-by: Jan Luebbe <jlu at pengutronix.de>
---
 arch/arm/mach-imx/clk-imx6.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-imx/clk-imx6.c b/arch/arm/mach-imx/clk-imx6.c
index a634580c86d5..26dfd1a7e16b 100644
--- a/arch/arm/mach-imx/clk-imx6.c
+++ b/arch/arm/mach-imx/clk-imx6.c
@@ -495,9 +495,9 @@ static int imx6_ccm_probe(struct device_d *dev)
 	writel(0xf0ffffff, ccm_base + CCGR1); /* gate GPU3D, GPU2D */
 	writel(0xffffffff, ccm_base + CCGR2);
 	if (IS_ENABLED(CONFIG_DRIVER_VIDEO_IMX_IPUV3))
-		writel(0xffffffff, ccm_base + CCGR3); /* gate OpenVG */
+		writel(0x3fffffff, ccm_base + CCGR3); /* gate OpenVG */
 	else
-		writel(0x3fffffff, ccm_base + CCGR3); /* gate OpenVG, LDB, IPU1, IPU2 */
+		writel(0x3fff0000, ccm_base + CCGR3); /* gate OpenVG, LDB, IPU1, IPU2 */
 	writel(0xffffffff, ccm_base + CCGR4);
 	writel(0xffffffff, ccm_base + CCGR5);
 	writel(0xffff3fff, ccm_base + CCGR6); /* gate VPU */
-- 
2.1.4