[RFC v2 03/10] MIPS: mach-ath79: add pbl_ar9331_uart_enable macro

[Antony Pavlov]

Signed-off-by: Oleksij Rempel <linux at rempel-privat.de>
Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
---
 arch/mips/include/asm/pbl_macros.h              | 11 +++++++++++
 arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 20 ++++++++++++++++++++
 arch/mips/mach-ath79/include/mach/pbl_macros.h  |  7 +++++++
 3 files changed, 38 insertions(+)

diff --git a/arch/mips/include/asm/pbl_macros.h b/arch/mips/include/asm/pbl_macros.h
index db46d0d..681b40a 100644
--- a/arch/mips/include/asm/pbl_macros.h
+++ b/arch/mips/include/asm/pbl_macros.h
@@ -37,6 +37,17 @@
 	.set	pop
 	.endm
 
+	.macro	pbl_reg_set val addr
+	.set push
+	.set noreorder
+	li	t9, \addr
+	li	t8, \val
+	lw	t7, 0(t9)
+	or	t7, t8
+	sw	t7, 0(t9)
+	.set	pop
+	.endm
+
 	.macro	pbl_reg_clr clr addr
 	.set push
 	.set noreorder
diff --git a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
index 6f1bf8e..4cbe94a 100644
--- a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
+++ b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h
@@ -25,6 +25,8 @@
 
 #define AR71XX_DDR_CTRL_BASE	(AR71XX_APB_BASE + 0x00000000)
 #define AR71XX_DDR_CTRL_SIZE	0x100
+#define AR71XX_GPIO_BASE	(AR71XX_APB_BASE + 0x00040000)
+#define AR71XX_GPIO_SIZE	0x100
 #define AR71XX_PLL_BASE		(AR71XX_APB_BASE + 0x00050000)
 #define AR71XX_PLL_SIZE		0x100
 #define AR71XX_RESET_BASE	(AR71XX_APB_BASE + 0x00060000)
@@ -52,6 +54,24 @@
 #define AR933X_DDR_DDR_EMR3		0x94
 
 /*
+ * GPIO block
+ */
+#define AR71XX_GPIO_REG_OE		0x00
+#define AR71XX_GPIO_REG_IN		0x04
+#define AR71XX_GPIO_REG_OUT		0x08
+#define AR71XX_GPIO_REG_SET		0x0c
+#define AR71XX_GPIO_REG_CLEAR		0x10
+#define AR71XX_GPIO_REG_INT_MODE	0x14
+#define AR71XX_GPIO_REG_INT_TYPE	0x18
+#define AR71XX_GPIO_REG_INT_POLARITY	0x1c
+#define AR71XX_GPIO_REG_INT_PENDING	0x20
+#define AR71XX_GPIO_REG_INT_ENABLE	0x24
+#define AR71XX_GPIO_REG_FUNC		0x28
+/* Warning! GPIO_FUNC[15] must be written with 1 */
+#define AR933X_GPIO_FUNC_RSRV15			BIT(15)
+#define AR933X_GPIO_FUNC_UART_EN		BIT(1)
+
+/*
  * PLL block
  */
 #define AR933X_PLL_CPU_CONFIG_REG	0x00
diff --git a/arch/mips/mach-ath79/include/mach/pbl_macros.h b/arch/mips/mach-ath79/include/mach/pbl_macros.h
index f0e0174..4ef90dc 100644
--- a/arch/mips/mach-ath79/include/mach/pbl_macros.h
+++ b/arch/mips/mach-ath79/include/mach/pbl_macros.h
@@ -129,4 +129,11 @@
 	.set	pop
 .endm
 
+#define GPIO_FUNC	((KSEG1 | AR71XX_GPIO_BASE) | AR71XX_GPIO_REG_FUNC)
+
+.macro	pbl_ar9331_uart_enable
+	pbl_reg_set AR933X_GPIO_FUNC_UART_EN \
+			| AR933X_GPIO_FUNC_RSRV15, GPIO_FUNC
+.endm
+
 #endif /* __ASM_MACH_ATH79_PBL_MACROS_H */
-- 
2.5.0