[For next PATCH] ARM: dts: phyFLEX: Add SKEW clock delays to emac0 node

[Sascha Hauer]

On Mon, Nov 03, 2014 at 11:12:15AM +0100, Wadim Egorov wrote:
> The KSZ9031 gigabit phy on the PBA-B-01 carrier board needs special settings
> for the RGMII skew control register.
> 
> Signed-off-by: Wadim Egorov <w.egorov at phytec.de>

Applied, thanks

Sascha

> ---
>  arch/arm/dts/am335x-phytec-phyflex.dts |   11 +++++++++++
>  1 files changed, 11 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/dts/am335x-phytec-phyflex.dts b/arch/arm/dts/am335x-phytec-phyflex.dts
> index 4dde328..c4481f5 100644
> --- a/arch/arm/dts/am335x-phytec-phyflex.dts
> +++ b/arch/arm/dts/am335x-phytec-phyflex.dts
> @@ -212,6 +212,17 @@
>  	phy_id = <&davinci_mdio>, <1>;
>  	phy-mode = "rgmii";
>  	dual_emac_res_vlan = <1>;
> +
> +	/* clock skew correction, maximum possible on KSZ9031 is
> +	2^5 - 1 * 0,06ns = 1860ps, micrel datasheet M9999-081712-0.11 p.58*/
> +	rxc-skew-ps = <1860>;
> +	txc-skew-ps = <1860>;
> +
> +	/* align tx signals to zero, leave rx to default */
> +	txd0-skew-ps = <0>;
> +	txd1-skew-ps = <0>;
> +	txd2-skew-ps = <0>;
> +	txd3-skew-ps = <0>;
>  };
>  
>  &cpsw_emac1 {
> -- 
> 1.7.0.4
> 
> 
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