atmel_nand pmecc on 8k page

[Raphaël Poggi]

Hi,

I'm testing with a custom board. I have just with the applied test and
it's working ! I can use 8k page nand with atmel_nand driver.

Do I have to wait until Matteo's patches are applied or can I submit
mine right now ?

Best regards,
Raphaël Poggi

2014-06-13 3:26 GMT+02:00 Bo Shen <voice.shen at atmel.com>:
> Hi Raphaël,
>
>
> On 06/12/2014 08:28 PM, Raphaël Poggi wrote:
>>
>> Hi,
>>
>> I'm working on a series of patches, to support 8k nand page in
>> atmel_nand driver.
>>
>> Currently, I can detect the nand and handle an oob size of 448. But i
>> have a problem with the pmecc, when barebox tried to perform pmecc
>> operation, I get the following message:
>>
>> PMECC: Timeout to calculate error location.
>>
>> Example of log:
>>
>> nand: NAND device: Manufacturer ID: 0x2c, Chip ID: 0x68 (Micron
>> MT29F32G08ABAAAWP), 4096MiB, page size: 8192, OOB size: 448
>> atmel_nand atmel_nand0: Initialize PMECC params, cap: 8, sector: 1024
>> atmel_nand atmel_nand0: PMECC: Timeout to calculate error location.
>> atmel_nand atmel_nand0: PMECC: Timeout to calculate error location.
>> atmel_nand atmel_nand0: PMECC: Timeout to calculate error location.
>> atmel_nand atmel_nand0: PMECC: Timeout to calculate error location.
>> Bad block table not found for chip 0
>> atmel_nand atmel_nand0: PMECC: Timeout to calculate error location.
>> atmel_nand atmel_nand0: PMECC: Timeout to calculate error location.
>> atmel_nand atmel_nand0: PMECC: Timeout to calculate error location.
>> atmel_nand atmel_nand0: PMECC: Timeout to calculate error location.
>> Bad block table not found for chip 0
>> Scanning device for bad blocks
>> Bad eraseblock 90 at 0x000005a00000
>> Bad eraseblock 91 at 0x000005b00000
>> atmel_nand atmel_nand0: PMECC: Timeout to get ECC value.
>> nand_bbt: error while writing bad block table -110
>>
>>
>> I don't know/find why barebox get a timeout...
>>
>> Someone have an idea ?
>
>
> Which board are you test this?
> Can you try to apply two patches from matteo.fortini at gmail.com on 2014-06-06
> with name
> [PATCH 1/2] sama5d3x: fix HSMC MODE register offset and add TIMINGS
> [PATCH 2/2] sama5d3x: HSMC NAND initialize TIMINGS and import values
>
>> Best regards,
>> Raphaël
>
>
> Best Regards,
> Bo Shen
>