[PATCH 1/3] ARM: socfpga: sockit: update sdram config

Steffen Trumtrar s.trumtrar at pengutronix.de
Mon Dec 9 09:10:12 EST 2013


This updates/changes the sdram config for the sockit to the quartus v13.1
autogenerated version.

Signed-off-by: Steffen Trumtrar <s.trumtrar at pengutronix.de>
---
 arch/arm/boards/terasic-sockit/sdram_config.h | 21 +++++++++++++--------
 1 file changed, 13 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boards/terasic-sockit/sdram_config.h b/arch/arm/boards/terasic-sockit/sdram_config.h
index 3d6f938..2c04b02 100644
--- a/arch/arm/boards/terasic-sockit/sdram_config.h
+++ b/arch/arm/boards/terasic-sockit/sdram_config.h
@@ -1,3 +1,6 @@
+#ifndef __SDRAM_CONFIG_H
+#define __SDRAM_CONFIG_H
+
 #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE			(2)
 #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL			(8)
 #define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER		(0)
@@ -58,12 +61,14 @@
 #define CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0	(0)
 #define CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4	(0x41041041)
 #define CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36	(0x410410)
-#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0 (0x80808080)
-#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32 (0x80808080)
-#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64 (0x8080)
+#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0 (0x01010101)
+#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32 (0x01010101)
+#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64 (0x0101)
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ			(0)
+#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE			(1)
+#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_READ_PORT_USED	(0x0)
+#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_WRITE_PORT_USED	(0x0)
+#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_COMMAND_PORT_USED	(0x0)
+#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST			(0x0)
 
-#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ                    (0)
-#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE                   (1)
-#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_READ_PORT_USED      (0)
-#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_WRITE_PORT_USED     (0)
-#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST_COMMAND_PORT_USED   (0)
+#endif	/*#ifndef__SDRAM_CONFIG_H*/
-- 
1.8.4.3




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