Re[2]: [RFC only] ARM: i.MX: Fix SDRAM size detect

Alexander Shiyan shc_work at
Fri Apr 26 07:12:56 EDT 2013

> On Fri, Apr 26, 2013 at 02:21:54PM +0400, Alexander Shiyan wrote:
> > This is a trying to fix problem described in:
> >
> Sorry, can you explain what the problem is and how this patch fixes
> that?
> How I understood it the problem was that your board had the second chip
> select enabled without having sdram connected there leading to a wrong
> size detection.
> > +	arm_add_mem_device("ram0", MX51_CSD0_BASE_ADDR, size);
> With this patch you imply that imx_v3_sdram_size does not work which was
> never mentioned in the thread you reference.
> Can you please post:
> - Which values the sdram controller is programmed with
> - How much memory you really have
> - what barebox detects

Values for ESDCTL is programmed by DCD-data from flash_header.
Currently both channels are enabled and configured to 256M.
Barebox is NOT detect size of memory, it just a read back these values.
At least on every i.MX51 this is not works correctly. In any words:
How much we specify in flash_header, this is our "detected" size.
I have a two modules (256M and 512M), barebox works when I
manually disable second SDRAM bank and of course say me
256M on both modules.

In the patch I am just choose 128M as safe size, then add additional
banks. Of course this is wrong if we have repeated memory and/or
holes, but I cannot see any other way at now...


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