[PATCH 03/13] ARM: ensure irqs are disabled

Vicente vicencb at gmail.com
Sun Oct 7 18:01:17 EDT 2012


Signed-off-by: Vicente <vicencb at gmail.com>
---
 arch/arm/cpu/cpu.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/cpu/cpu.c b/arch/arm/cpu/cpu.c
index 87ba877..da88f00 100644
--- a/arch/arm/cpu/cpu.c
+++ b/arch/arm/cpu/cpu.c
@@ -28,6 +28,7 @@
 #include <asm/mmu.h>
 #include <asm/system.h>
 #include <asm/memory.h>
+#include <asm/ptrace.h>
 
 /**
  * Enable processor's instruction cache
@@ -85,6 +86,16 @@ void arch_shutdown(void)
 		: "r0", "r1", "r2", "r3", "r6", "r10", "r12", "lr", "cc", "memory"
 	);
 #endif
+	/*
+	 * barebox normally does not use interrupts, but some functionalities
+	 * (eg. OMAP4_USBBOOT) require them enabled. So be sure interrupts are
+	 * disabled before exiting.
+	 */
+#if __LINUX_ARM_ARCH__ >= 6
+	__asm__ __volatile__ ("cpsid i\n");
+#else
+	__asm__ __volatile__ ("msr cpsr_c, #PSR_I_BIT | SVC_MODE\n");
+#endif
 }
 
 #ifdef CONFIG_THUMB2_BAREBOX
-- 
1.7.12.2




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