[PATCH 02/13] at91: enable clock via clock framework

[Jean-Christophe PLAGNIOL-VILLARD]

fix at91sam926x timer and dss11

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 arch/arm/boards/dss11/init.c          |    6 ++++--
 arch/arm/mach-at91/at91sam926x_time.c |   23 ++++++++++++++++-------
 2 files changed, 20 insertions(+), 9 deletions(-)

diff --git a/arch/arm/boards/dss11/init.c b/arch/arm/boards/dss11/init.c
index 27c1ec7..12d4263 100644
--- a/arch/arm/boards/dss11/init.c
+++ b/arch/arm/boards/dss11/init.c
@@ -32,8 +32,8 @@
 #include <mach/sam9_smc.h>
 #include <gpio.h>
 #include <mach/io.h>
-#include <mach/at91_pmc.h>
 #include <mach/at91_rstc.h>
+#include <linux/clk.h>
 
 static struct atmel_nand_data nand_pdata = {
 	.ale		= 21,
@@ -82,7 +82,9 @@ static struct at91_ether_platform_data macb_pdata = {
 static void dss11_phy_reset(void)
 {
 	unsigned long rstc;
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC);
+	struct clk *clk = clk_get(NULL, "macb_clk");
+
+	clk_enable(clk);
 
 	at91_set_gpio_input(AT91_PIN_PA14, 0);
 	at91_set_gpio_input(AT91_PIN_PA15, 0);
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c
index 7425e0a..1ce8d30 100644
--- a/arch/arm/mach-at91/at91sam926x_time.c
+++ b/arch/arm/mach-at91/at91sam926x_time.c
@@ -30,11 +30,11 @@
 #include <clock.h>
 #include <asm/hardware.h>
 #include <mach/at91_pit.h>
-#include <mach/at91_pmc.h>
 #include <mach/at91_rstc.h>
 #include <mach/io.h>
 #include <io.h>
 #include <linux/clk.h>
+#include <linux/err.h>
 
 uint64_t at91sam9_clocksource_read(void)
 {
@@ -49,15 +49,24 @@ static struct clocksource cs = {
 
 static int clocksource_init (void)
 {
+	struct clk *clk;
 	u32 pit_rate;
 
-	/*
-	 * Enable PITC Clock
-	 * The clock is already enabled for system controller in boot
-	 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
+	clk = clk_get(NULL, "mck");
+	if (IS_ERR(clk)) {
+		ret = PTR_ERR(clk);
+		dev_err(dev, "clock not found: %d\n", ret);
+		return ret;
+	}
 
-	pit_rate = clk_get_rate(clk_get(NULL, "mck")) / 16;
+	ret = clk_enable(clk);
+	if (ret < 0) {
+		dev_err(dev, "clock failed to enable: %d\n", ret);
+		clk_put(clk);
+		return ret;
+	}
+
+	pit_rate = clk_get_rate(clk) / 16;
 
 	/* Enable PITC */
 	at91_sys_write(AT91_PIT_MR, 0xfffff | AT91_PIT_PITEN);
-- 
1.7.10.4