[PATCH] armv7: use -march=armv6 to compile v7 code

[Sascha Hauer]

-march=armv7-a is available only in in newer gccs (>=4.3.2?)
To make this work use 'mcr     p15, 0, r10, c7, c5, 4' instead
of isb as seen in the kernel head.S

Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/Makefile        |    2 +-
 arch/arm/cpu/start-arm.S |    4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index ede2085..ab241dc 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -19,7 +19,7 @@ comma = ,
 # Note that GCC does not numerically define an architecture version
 # macro, but instead defines a whole series of macros which makes
 # testing for a specific architecture or later rather impossible.
-arch-$(CONFIG_CPU_32v7)		:=-D__LINUX_ARM_ARCH__=7 $(call cc-option,-march=armv7-a,-march=armv5t -Wa$(comma)-march=armv7-a)
+arch-$(CONFIG_CPU_32v7)		:=-D__LINUX_ARM_ARCH__=7 $(call cc-option,-march=armv7-a,-march=armv6)
 arch-$(CONFIG_CPU_32v5)		:=-D__LINUX_ARM_ARCH__=5 $(call cc-option,-march=armv5te,-march=armv4t)
 arch-$(CONFIG_CPU_32v4T)	:=-D__LINUX_ARM_ARCH__=4 -march=armv4t
 
diff --git a/arch/arm/cpu/start-arm.S b/arch/arm/cpu/start-arm.S
index a30b281..6858dbc 100644
--- a/arch/arm/cpu/start-arm.S
+++ b/arch/arm/cpu/start-arm.S
@@ -152,7 +152,7 @@ inval_loop1:
 	cmp	r1, #2			/* see what cache we have at this level */
 	blt	skip_inval		/* skip if no cache, or just i-cache */
 	mcr	p15, 2, r10, c0, c0, 0	/* select current cache level in cssr */
-	isb				/* isb to sych the new cssr&csidr */
+	mcr     p15, 0, r10, c7, c5, 4	/* isb to sych the new cssr&csidr */
 	mrc	p15, 1, r1, c0, c0, 0	/* read the new csidr */
 	and	r2, r1, #7		/* extract the length of the cache lines */
 	add	r2, r2, #4		/* add 4 (line length offset) */
@@ -178,7 +178,7 @@ skip_inval:
 finished_inval:
 	mov	r10, #0			/* swith back to cache level 0 */
 	mcr	p15, 2, r10, c0, c0, 0	/* select current cache level in cssr */
-	isb
+	mcr     p15, 0, r10, c7, c5, 4  /* isb */
 #endif /* CONFIG_CPU_V7_DCACHE_SKIP */
 
 #else
-- 
1.6.6


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