[RFC PATCH 02/18] arm64: dts: qcom: add wifi node for IPQ5332 based RDP441
Raj Kumar Bhagat
quic_rajkbhag at quicinc.com
Wed Aug 14 02:43:07 PDT 2024
RDP441 is based on IPQ5332. It has inbuilt AHB bus based IPQ5332 WiFi
device.
Describe and add WiFi node for RDP441. Also, reserve the memory
required by IPQ5332 firmware.
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag at quicinc.com>
---
arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts | 56 ++++++++-
arch/arm64/boot/dts/qcom/ipq5332.dtsi | 131 +++++++++++++++++++-
2 files changed, 184 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts b/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts
index 9aaa3d802178..0168d3a11416 100644
--- a/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts
+++ b/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts
@@ -2,7 +2,7 @@
/*
* IPQ5332 AP-MI01.2 board device tree source
*
- * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
@@ -12,6 +12,51 @@
/ {
model = "Qualcomm Technologies, Inc. IPQ5332 MI01.2";
compatible = "qcom,ipq5332-ap-mi01.2", "qcom,ipq5332";
+
+ /* Default Profile
+ * +============+==============+=====================+
+ * | | | |
+ * | Region | Start Offset | Size |
+ * | | | |
+ * +------------+--------------+---------------------+
+ * | | | |
+ * | | | |
+ * | | | |
+ * | WLAN Q6 | 0x4A900000 | 35MB |
+ * | | | |
+ * | | | |
+ * +------------+--------------+---------------------+
+ * | M3 Dump | 0x4CC00000 | 1MB |
+ * +============+==============+=====================+
+ * | |
+ * | |
+ * | |
+ * | Rest of memory for Linux |
+ * | |
+ * | |
+ * | |
+ * +=================================================+
+ */
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ q6_region: wcnss at 4a900000 {
+ no-map;
+ reg = <0x0 0x4a900000 0x0 0x02300000>;
+ };
+
+ m3_dump: m3_dump at 4cc00000 {
+ no-map;
+ reg = <0x0 0x4CC00000 0x0 0x100000>;
+ };
+
+ /* mlo_global_mem0: The MLO global memory is not
+ * enabled yet.
+ */
+ };
};
&blsp1_i2c1 {
@@ -22,7 +67,7 @@ &blsp1_i2c1 {
};
&q6v5_wcss {
- pd-1 {
+ q6_wcss_pd1: pd-1 {
firmware-name = "ath11k/IPQ5332/hw1.0/q6_fw1.mdt";
interrupts-extended = <&wcss_smp2p_in 8 IRQ_TYPE_NONE>,
<&wcss_smp2p_in 9 IRQ_TYPE_NONE>,
@@ -42,6 +87,13 @@ pd-1 {
};
};
+&wifi0 {
+ memory-region = <&q6_region>;
+ qcom,board_id = <0x12>;
+ qcom,rproc = <&q6_wcss_pd1>;
+ status = "okay";
+};
+
&sdhc {
bus-width = <4>;
max-frequency = <192000000>;
diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
index 1c4e5e0104ca..eb9a1ce7e2e2 100644
--- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
@@ -2,7 +2,7 @@
/*
* IPQ5332 device tree source
*
- * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <dt-bindings/clock/qcom,apss-ipq.h>
@@ -511,6 +511,135 @@ glink-edge {
mboxes = <&apcs_glb 8>;
};
};
+
+ wifi0: wifi at c0000000 {
+ compatible = "qcom,ipq5332-wifi";
+ reg = <0xc000000 0x1000000>;
+ clocks = <&gcc GCC_XO_CLK>,
+ <&gcc GCC_IM_SLEEP_CLK>;
+ clock-names = "gcc_xo_clk",
+ "gcc_im_sleep_clk";
+ interrupts = <GIC_SPI 559 IRQ_TYPE_EDGE_RISING>, // misc-pulse1
+ <GIC_SPI 560 IRQ_TYPE_EDGE_RISING>, // misc-latch
+ <GIC_SPI 561 IRQ_TYPE_EDGE_RISING>, // sw-exception
+ <GIC_SPI 422 IRQ_TYPE_EDGE_RISING>, // ce0
+ <GIC_SPI 423 IRQ_TYPE_EDGE_RISING>, // ce1
+ <GIC_SPI 424 IRQ_TYPE_EDGE_RISING>, // ce2
+ <GIC_SPI 425 IRQ_TYPE_EDGE_RISING>, // ce3
+ <GIC_SPI 426 IRQ_TYPE_EDGE_RISING>, // ce4
+ <GIC_SPI 427 IRQ_TYPE_EDGE_RISING>, // ce5
+ <GIC_SPI 428 IRQ_TYPE_EDGE_RISING>, // ce6
+ <GIC_SPI 429 IRQ_TYPE_EDGE_RISING>, // ce7
+ <GIC_SPI 430 IRQ_TYPE_EDGE_RISING>, // ce8
+ <GIC_SPI 431 IRQ_TYPE_EDGE_RISING>, // ce9
+ <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>, // ce10
+ <GIC_SPI 433 IRQ_TYPE_EDGE_RISING>, // ce11
+ <GIC_SPI 491 IRQ_TYPE_EDGE_RISING>, // host2wbm-desc-feed
+ <GIC_SPI 495 IRQ_TYPE_EDGE_RISING>,
+ // host2reo-re-injection
+ <GIC_SPI 493 IRQ_TYPE_EDGE_RISING>, // host2reo-command
+ <GIC_SPI 544 IRQ_TYPE_EDGE_RISING>,
+ // host2rxdma-monitor-ring1
+ <GIC_SPI 457 IRQ_TYPE_EDGE_RISING>, // reo2ost-exception
+ <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>,
+ // wbm2host-rx-release
+ <GIC_SPI 497 IRQ_TYPE_EDGE_RISING>, // reo2host-status
+ <GIC_SPI 454 IRQ_TYPE_EDGE_RISING>,
+ // reo2host-destination-ring4
+ <GIC_SPI 453 IRQ_TYPE_EDGE_RISING>,
+ // reo2host-destination-ring3
+ <GIC_SPI 452 IRQ_TYPE_EDGE_RISING>,
+ // reo2host-destination-ring2
+ <GIC_SPI 451 IRQ_TYPE_EDGE_RISING>,
+ // reo2host-destination-ring1
+ <GIC_SPI 488 IRQ_TYPE_EDGE_RISING>,
+ // rxdma2host-monitor-destination-mac3
+ <GIC_SPI 488 IRQ_TYPE_EDGE_RISING>,
+ // rxdma2host-monitor-destination-mac2
+ <GIC_SPI 484 IRQ_TYPE_EDGE_RISING>,
+ // rxdma2host-monitor-destination-mac1
+ <GIC_SPI 554 IRQ_TYPE_EDGE_RISING>,
+ // host2rxdma-host-buf-ring-mac3
+ <GIC_SPI 554 IRQ_TYPE_EDGE_RISING>,
+ // host2rxdma-host-buf-ring-mac2
+ <GIC_SPI 549 IRQ_TYPE_EDGE_RISING>,
+ // host2rxdma-host-buf-ring-mac1
+ <GIC_SPI 507 IRQ_TYPE_EDGE_RISING>,
+ // host2tcl-input-ring4
+ <GIC_SPI 500 IRQ_TYPE_EDGE_RISING>,
+ // host2tcl-input-ring3
+ <GIC_SPI 499 IRQ_TYPE_EDGE_RISING>,
+ // host2tcl-input-ring2
+ <GIC_SPI 498 IRQ_TYPE_EDGE_RISING>,
+ // host2tcl-input-ring1
+ <GIC_SPI 450 IRQ_TYPE_EDGE_RISING>,
+ // wbm2host-tx-completions-ring4
+ <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>,
+ // wbm2host-tx-completions-ring3
+ <GIC_SPI 448 IRQ_TYPE_EDGE_RISING>,
+ // wbm2host-tx-completions-ring2
+ <GIC_SPI 447 IRQ_TYPE_EDGE_RISING>,
+ // wbm2host-tx-completions-ring1
+ <GIC_SPI 543 IRQ_TYPE_EDGE_RISING>,
+ // host2tx-monitor-ring1
+ <GIC_SPI 486 IRQ_TYPE_EDGE_RISING>,
+ // txmon2host-monitor-destination-mac3
+ <GIC_SPI 486 IRQ_TYPE_EDGE_RISING>,
+ // txmon2host-monitor-destination-mac2
+ <GIC_SPI 482 IRQ_TYPE_EDGE_RISING>,
+ // txmon2host-monitor-destination-mac1
+ <GIC_SPI 419 IRQ_TYPE_EDGE_RISING>; // umac_reset
+
+ interrupt-names = "misc-pulse1",
+ "misc-latch",
+ "sw-exception",
+ "ce0",
+ "ce1",
+ "ce2",
+ "ce3",
+ "ce4",
+ "ce5",
+ "ce6",
+ "ce7",
+ "ce8",
+ "ce9",
+ "ce10",
+ "ce11",
+ "host2wbm-desc-feed",
+ "host2reo-re-injection",
+ "host2reo-command",
+ "host2rxdma-monitor-ring1",
+ "reo2ost-exception",
+ "wbm2host-rx-release",
+ "reo2host-status",
+ "reo2host-destination-ring4",
+ "reo2host-destination-ring3",
+ "reo2host-destination-ring2",
+ "reo2host-destination-ring1",
+ "rxdma2host-monitor-destination-mac3",
+ "rxdma2host-monitor-destination-mac2",
+ "rxdma2host-monitor-destination-mac1",
+ "host2rxdma-host-buf-ring-mac3",
+ "host2rxdma-host-buf-ring-mac2",
+ "host2rxdma-host-buf-ring-mac1",
+ "host2tcl-input-ring4",
+ "host2tcl-input-ring3",
+ "host2tcl-input-ring2",
+ "host2tcl-input-ring1",
+ "wbm2host-tx-completions-ring4",
+ "wbm2host-tx-completions-ring3",
+ "wbm2host-tx-completions-ring2",
+ "wbm2host-tx-completions-ring1",
+ "host2tx-monitor-ring1",
+ "txmon2host-monitor-destination-mac3",
+ "txmon2host-monitor-destination-mac2",
+ "txmon2host-monitor-destination-mac1",
+ "umac_reset";
+
+ qcom,bdf-addr = <0x4B500000>;
+ status = "disabled";
+ };
+
};
timer {
--
2.34.1
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