[PATCH] ath10k: Replace bit shifts with the BIT() macro for rx desc bits
Govind Singh
govinds at codeaurora.org
Tue May 8 21:48:04 PDT 2018
Use the BIT() macro from 'linux/bitops.h' to define the rx desc
bit flags to have consistency with new definitions.
Signed-off-by: Govind Singh <govinds at codeaurora.org>
---
drivers/net/wireless/ath/ath10k/rx_desc.h | 134 +++++++++++-----------
1 file changed, 67 insertions(+), 67 deletions(-)
diff --git a/drivers/net/wireless/ath/ath10k/rx_desc.h b/drivers/net/wireless/ath/ath10k/rx_desc.h
index 545deb6d7af1..b3d7c6e7ac90 100644
--- a/drivers/net/wireless/ath/ath10k/rx_desc.h
+++ b/drivers/net/wireless/ath/ath10k/rx_desc.h
@@ -19,38 +19,38 @@
#define _RX_DESC_H_
enum rx_attention_flags {
- RX_ATTENTION_FLAGS_FIRST_MPDU = 1 << 0,
- RX_ATTENTION_FLAGS_LAST_MPDU = 1 << 1,
- RX_ATTENTION_FLAGS_MCAST_BCAST = 1 << 2,
- RX_ATTENTION_FLAGS_PEER_IDX_INVALID = 1 << 3,
- RX_ATTENTION_FLAGS_PEER_IDX_TIMEOUT = 1 << 4,
- RX_ATTENTION_FLAGS_POWER_MGMT = 1 << 5,
- RX_ATTENTION_FLAGS_NON_QOS = 1 << 6,
- RX_ATTENTION_FLAGS_NULL_DATA = 1 << 7,
- RX_ATTENTION_FLAGS_MGMT_TYPE = 1 << 8,
- RX_ATTENTION_FLAGS_CTRL_TYPE = 1 << 9,
- RX_ATTENTION_FLAGS_MORE_DATA = 1 << 10,
- RX_ATTENTION_FLAGS_EOSP = 1 << 11,
- RX_ATTENTION_FLAGS_U_APSD_TRIGGER = 1 << 12,
- RX_ATTENTION_FLAGS_FRAGMENT = 1 << 13,
- RX_ATTENTION_FLAGS_ORDER = 1 << 14,
- RX_ATTENTION_FLAGS_CLASSIFICATION = 1 << 15,
- RX_ATTENTION_FLAGS_OVERFLOW_ERR = 1 << 16,
- RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR = 1 << 17,
- RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL = 1 << 18,
- RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL = 1 << 19,
- RX_ATTENTION_FLAGS_SA_IDX_INVALID = 1 << 20,
- RX_ATTENTION_FLAGS_DA_IDX_INVALID = 1 << 21,
- RX_ATTENTION_FLAGS_SA_IDX_TIMEOUT = 1 << 22,
- RX_ATTENTION_FLAGS_DA_IDX_TIMEOUT = 1 << 23,
- RX_ATTENTION_FLAGS_ENCRYPT_REQUIRED = 1 << 24,
- RX_ATTENTION_FLAGS_DIRECTED = 1 << 25,
- RX_ATTENTION_FLAGS_BUFFER_FRAGMENT = 1 << 26,
- RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR = 1 << 27,
- RX_ATTENTION_FLAGS_TKIP_MIC_ERR = 1 << 28,
- RX_ATTENTION_FLAGS_DECRYPT_ERR = 1 << 29,
- RX_ATTENTION_FLAGS_FCS_ERR = 1 << 30,
- RX_ATTENTION_FLAGS_MSDU_DONE = 1 << 31,
+ RX_ATTENTION_FLAGS_FIRST_MPDU = BIT(0),
+ RX_ATTENTION_FLAGS_LAST_MPDU = BIT(1),
+ RX_ATTENTION_FLAGS_MCAST_BCAST = BIT(2),
+ RX_ATTENTION_FLAGS_PEER_IDX_INVALID = BIT(3),
+ RX_ATTENTION_FLAGS_PEER_IDX_TIMEOUT = BIT(4),
+ RX_ATTENTION_FLAGS_POWER_MGMT = BIT(5),
+ RX_ATTENTION_FLAGS_NON_QOS = BIT(6),
+ RX_ATTENTION_FLAGS_NULL_DATA = BIT(7),
+ RX_ATTENTION_FLAGS_MGMT_TYPE = BIT(8),
+ RX_ATTENTION_FLAGS_CTRL_TYPE = BIT(9),
+ RX_ATTENTION_FLAGS_MORE_DATA = BIT(10),
+ RX_ATTENTION_FLAGS_EOSP = BIT(11),
+ RX_ATTENTION_FLAGS_U_APSD_TRIGGER = BIT(12),
+ RX_ATTENTION_FLAGS_FRAGMENT = BIT(13),
+ RX_ATTENTION_FLAGS_ORDER = BIT(14),
+ RX_ATTENTION_FLAGS_CLASSIFICATION = BIT(15),
+ RX_ATTENTION_FLAGS_OVERFLOW_ERR = BIT(16),
+ RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR = BIT(17),
+ RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL = BIT(18),
+ RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL = BIT(19),
+ RX_ATTENTION_FLAGS_SA_IDX_INVALID = BIT(20),
+ RX_ATTENTION_FLAGS_DA_IDX_INVALID = BIT(21),
+ RX_ATTENTION_FLAGS_SA_IDX_TIMEOUT = BIT(22),
+ RX_ATTENTION_FLAGS_DA_IDX_TIMEOUT = BIT(23),
+ RX_ATTENTION_FLAGS_ENCRYPT_REQUIRED = BIT(24),
+ RX_ATTENTION_FLAGS_DIRECTED = BIT(25),
+ RX_ATTENTION_FLAGS_BUFFER_FRAGMENT = BIT(26),
+ RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR = BIT(27),
+ RX_ATTENTION_FLAGS_TKIP_MIC_ERR = BIT(28),
+ RX_ATTENTION_FLAGS_DECRYPT_ERR = BIT(29),
+ RX_ATTENTION_FLAGS_FCS_ERR = BIT(30),
+ RX_ATTENTION_FLAGS_MSDU_DONE = BIT(31),
};
struct rx_attention {
@@ -254,15 +254,15 @@ enum htt_rx_mpdu_encrypt_type {
#define RX_MPDU_START_INFO0_SEQ_NUM_LSB 16
#define RX_MPDU_START_INFO0_ENCRYPT_TYPE_MASK 0xf0000000
#define RX_MPDU_START_INFO0_ENCRYPT_TYPE_LSB 28
-#define RX_MPDU_START_INFO0_FROM_DS (1 << 11)
-#define RX_MPDU_START_INFO0_TO_DS (1 << 12)
-#define RX_MPDU_START_INFO0_ENCRYPTED (1 << 13)
-#define RX_MPDU_START_INFO0_RETRY (1 << 14)
-#define RX_MPDU_START_INFO0_TXBF_H_INFO (1 << 15)
+#define RX_MPDU_START_INFO0_FROM_DS BIT(11)
+#define RX_MPDU_START_INFO0_TO_DS BIT(12)
+#define RX_MPDU_START_INFO0_ENCRYPTED BIT(13)
+#define RX_MPDU_START_INFO0_RETRY BIT(14)
+#define RX_MPDU_START_INFO0_TXBF_H_INFO BIT(15)
#define RX_MPDU_START_INFO1_TID_MASK 0xf0000000
#define RX_MPDU_START_INFO1_TID_LSB 28
-#define RX_MPDU_START_INFO1_DIRECTED (1 << 16)
+#define RX_MPDU_START_INFO1_DIRECTED BIT(16)
struct rx_mpdu_start {
__le32 info0;
@@ -357,13 +357,13 @@ struct rx_mpdu_start {
#define RX_MPDU_END_INFO0_RESERVED_0_LSB 0
#define RX_MPDU_END_INFO0_POST_DELIM_CNT_MASK 0x0fff0000
#define RX_MPDU_END_INFO0_POST_DELIM_CNT_LSB 16
-#define RX_MPDU_END_INFO0_OVERFLOW_ERR (1 << 13)
-#define RX_MPDU_END_INFO0_LAST_MPDU (1 << 14)
-#define RX_MPDU_END_INFO0_POST_DELIM_ERR (1 << 15)
-#define RX_MPDU_END_INFO0_MPDU_LENGTH_ERR (1 << 28)
-#define RX_MPDU_END_INFO0_TKIP_MIC_ERR (1 << 29)
-#define RX_MPDU_END_INFO0_DECRYPT_ERR (1 << 30)
-#define RX_MPDU_END_INFO0_FCS_ERR (1 << 31)
+#define RX_MPDU_END_INFO0_OVERFLOW_ERR BIT(13)
+#define RX_MPDU_END_INFO0_LAST_MPDU BIT(14)
+#define RX_MPDU_END_INFO0_POST_DELIM_ERR BIT(15)
+#define RX_MPDU_END_INFO0_MPDU_LENGTH_ERR BIT(28)
+#define RX_MPDU_END_INFO0_TKIP_MIC_ERR BIT(29)
+#define RX_MPDU_END_INFO0_DECRYPT_ERR BIT(30)
+#define RX_MPDU_END_INFO0_FCS_ERR BIT(31)
struct rx_mpdu_end {
__le32 info0;
@@ -422,12 +422,12 @@ struct rx_mpdu_end {
#define RX_MSDU_START_INFO1_DECAP_FORMAT_LSB 8
#define RX_MSDU_START_INFO1_SA_IDX_MASK 0x07ff0000
#define RX_MSDU_START_INFO1_SA_IDX_LSB 16
-#define RX_MSDU_START_INFO1_IPV4_PROTO (1 << 10)
-#define RX_MSDU_START_INFO1_IPV6_PROTO (1 << 11)
-#define RX_MSDU_START_INFO1_TCP_PROTO (1 << 12)
-#define RX_MSDU_START_INFO1_UDP_PROTO (1 << 13)
-#define RX_MSDU_START_INFO1_IP_FRAG (1 << 14)
-#define RX_MSDU_START_INFO1_TCP_ONLY_ACK (1 << 15)
+#define RX_MSDU_START_INFO1_IPV4_PROTO BIT(10)
+#define RX_MSDU_START_INFO1_IPV6_PROTO BIT(11)
+#define RX_MSDU_START_INFO1_TCP_PROTO BIT(12)
+#define RX_MSDU_START_INFO1_UDP_PROTO BIT(13)
+#define RX_MSDU_START_INFO1_IP_FRAG BIT(14)
+#define RX_MSDU_START_INFO1_TCP_ONLY_ACK BIT(15)
#define RX_MSDU_START_INFO2_DA_IDX_MASK 0x000007ff
#define RX_MSDU_START_INFO2_DA_IDX_LSB 0
@@ -568,10 +568,10 @@ struct rx_msdu_start {
#define RX_MSDU_END_INFO0_REPORTED_MPDU_LENGTH_MASK 0x00003fff
#define RX_MSDU_END_INFO0_REPORTED_MPDU_LENGTH_LSB 0
-#define RX_MSDU_END_INFO0_FIRST_MSDU (1 << 14)
-#define RX_MSDU_END_INFO0_LAST_MSDU (1 << 15)
-#define RX_MSDU_END_INFO0_PRE_DELIM_ERR (1 << 30)
-#define RX_MSDU_END_INFO0_RESERVED_3B (1 << 31)
+#define RX_MSDU_END_INFO0_FIRST_MSDU BIT(14)
+#define RX_MSDU_END_INFO0_LAST_MSDU BIT(15)
+#define RX_MSDU_END_INFO0_PRE_DELIM_ERR BIT(30)
+#define RX_MSDU_END_INFO0_RESERVED_3B BIT(31)
struct rx_msdu_end_common {
__le16 ip_hdr_cksum;
@@ -691,7 +691,7 @@ struct rx_msdu_end {
#define HTT_RX_PPDU_START_PREAMBLE_VHT 0x0C
#define HTT_RX_PPDU_START_PREAMBLE_VHT_WITH_TXBF 0x0D
-#define RX_PPDU_START_INFO0_IS_GREENFIELD (1 << 0)
+#define RX_PPDU_START_INFO0_IS_GREENFIELD BIT(0)
#define RX_PPDU_START_INFO1_L_SIG_RATE_MASK 0x0000000f
#define RX_PPDU_START_INFO1_L_SIG_RATE_LSB 0
@@ -701,15 +701,15 @@ struct rx_msdu_end {
#define RX_PPDU_START_INFO1_L_SIG_TAIL_LSB 18
#define RX_PPDU_START_INFO1_PREAMBLE_TYPE_MASK 0xff000000
#define RX_PPDU_START_INFO1_PREAMBLE_TYPE_LSB 24
-#define RX_PPDU_START_INFO1_L_SIG_RATE_SELECT (1 << 4)
-#define RX_PPDU_START_INFO1_L_SIG_PARITY (1 << 17)
+#define RX_PPDU_START_INFO1_L_SIG_RATE_SELECT BIT(4)
+#define RX_PPDU_START_INFO1_L_SIG_PARITY BIT(17)
#define RX_PPDU_START_INFO2_HT_SIG_VHT_SIG_A_1_MASK 0x00ffffff
#define RX_PPDU_START_INFO2_HT_SIG_VHT_SIG_A_1_LSB 0
#define RX_PPDU_START_INFO3_HT_SIG_VHT_SIG_A_2_MASK 0x00ffffff
#define RX_PPDU_START_INFO3_HT_SIG_VHT_SIG_A_2_LSB 0
-#define RX_PPDU_START_INFO3_TXBF_H_INFO (1 << 24)
+#define RX_PPDU_START_INFO3_TXBF_H_INFO BIT(24)
#define RX_PPDU_START_INFO4_VHT_SIG_B_MASK 0x1fffffff
#define RX_PPDU_START_INFO4_VHT_SIG_B_LSB 0
@@ -898,14 +898,14 @@ struct rx_ppdu_start {
* Reserved: HW should fill with 0, FW should ignore.
*/
-#define RX_PPDU_END_FLAGS_PHY_ERR (1 << 0)
-#define RX_PPDU_END_FLAGS_RX_LOCATION (1 << 1)
-#define RX_PPDU_END_FLAGS_TXBF_H_INFO (1 << 2)
+#define RX_PPDU_END_FLAGS_PHY_ERR BIT(0)
+#define RX_PPDU_END_FLAGS_RX_LOCATION BIT(1)
+#define RX_PPDU_END_FLAGS_TXBF_H_INFO BIT(2)
#define RX_PPDU_END_INFO0_RX_ANTENNA_MASK 0x00ffffff
#define RX_PPDU_END_INFO0_RX_ANTENNA_LSB 0
-#define RX_PPDU_END_INFO0_FLAGS_TX_HT_VHT_ACK (1 << 24)
-#define RX_PPDU_END_INFO0_BB_CAPTURED_CHANNEL (1 << 25)
+#define RX_PPDU_END_INFO0_FLAGS_TX_HT_VHT_ACK BIT(24)
+#define RX_PPDU_END_INFO0_BB_CAPTURED_CHANNEL BIT(25)
#define RX_PPDU_END_INFO1_PEER_IDX_MASK 0x1ffc
#define RX_PPDU_END_INFO1_PEER_IDX_LSB 2
@@ -1265,9 +1265,9 @@ struct rx_ppdu_end {
* to 0.
*/
-#define FW_RX_DESC_INFO0_DISCARD (1 << 0)
-#define FW_RX_DESC_INFO0_FORWARD (1 << 1)
-#define FW_RX_DESC_INFO0_INSPECT (1 << 5)
+#define FW_RX_DESC_INFO0_DISCARD BIT(0)
+#define FW_RX_DESC_INFO0_FORWARD BIT(1)
+#define FW_RX_DESC_INFO0_INSPECT BIT(5)
#define FW_RX_DESC_INFO0_EXT_MASK 0xC0
#define FW_RX_DESC_INFO0_EXT_LSB 6
--
2.17.0
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