[PATCH v3] ath10k: Bypass PLL setting on target init for QCA9888

[Kalle Valo]

Rajkumar Manoharan <rmanohar at qti.qualcomm.com> writes:

> Some of of qca988x solutions are having global reset issue
> during target initialization. Bypassing PLL setting before
> downloading firmware and letting the SoC run on REF_CLK is fixing
> the problem. Corresponding firmware change is also needed to set
> the clock source once the target is initialized. Since 10.2.4
> firmware is having this ROM patch, applying skip_clock_init only
> for 10.2.4 firmware versions.
>
> Signed-off-by: Rajkumar Manoharan <rmanohar at qti.qualcomm.com>
> ---
>  drivers/net/wireless/ath/ath10k/core.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
>
> diff --git a/drivers/net/wireless/ath/ath10k/core.c b/drivers/net/wireless/ath/ath10k/core.c
> index bcccae1..cb34619 100644
> --- a/drivers/net/wireless/ath/ath10k/core.c
> +++ b/drivers/net/wireless/ath/ath10k/core.c
> @@ -1084,6 +1084,16 @@ int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode)
>  	if (status)
>  		goto err;
>  
> +	if ((ar->hw_rev == ATH10K_HW_QCA988X) &&
> +	    (ar->wmi.op_version == ATH10K_FW_WMI_OP_VERSION_10_2_4)) {
> +		status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
> +		if (status) {
> +			ath10k_err(ar, "could not write skip_clock_init (%d)\n",
> +				   status);
> +			goto err;
> +		}
> +	}

I think it's better to use enum ath10k_fw_features for this as that
gives more flexibility how to enable this.

-- 
Kalle Valo