request: ACK timing setting required

Ben Greear greearb at candelatech.com
Mon May 25 12:32:51 PDT 2015



On 05/25/2015 12:21 PM, Sebastian Gottschall wrote:
> Am 25.05.2015 um 19:53 schrieb Ben Greear:
>>
>>
>> On 05/25/2015 10:48 AM, Sebastian Gottschall wrote:
>>> Am 25.05.2015 um 19:13 schrieb Ben Greear:
>>>>
>>>>
>>>> On 05/25/2015 10:10 AM, Sebastian Gottschall wrote:
>>>>> Hello
>>>>>
>>>>> could it be possible to add a ACK timing feature to the ath10k firmware (QCA9880 internal register 0x8014, mask 0x3FFF)
>>>>
>>>> You just need ability to set this register to some value?
>>>>
>>>> If so, probably something I could add to CT firmware, at least.
>>>>
>>> not alone. this register is rewritten on each reset (channel change etc.) so it needs to be correct handled.
>>> yes. just writing and handling the ack value would be enough. the math behind is no problem.
>>> otherwise its impossible todo long range links with ath10k. (LSDK based firmware from compex do support this feature unlike ath10k)
>>
>> I'll see if I can add this to my firmware, probably will be a few days before I can get
>> time to work on it.  Will post to list when I have a FW build ready for testing.
> do you plan to bring up your codebase to 10.2.4 with api 5 one time?
> or is the code already up to date, just using the old api?

I'm having a slow time getting updated source from QCA, but I plan to
move to a newer code base when I can get access.

For now, my firmware is based on 10.1.467, but it has quite a bit of improvements
and changes.  It does not support some of the newer chipsets that newer QCA
firmware supports.

Thanks,
Ben


-- 
Ben Greear <greearb at candelatech.com>
Candela Technologies Inc  http://www.candelatech.com



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