[PATCH] ath10k: Replace ioread with wmb for data sync
Johannes Berg
johannes at sipsolutions.net
Tue Jan 27 23:37:23 PST 2015
On Tue, 2015-01-27 at 21:39 -0800, Peter Oh wrote:
> > Ok, sure, but I/O ordering two different writes, and ensuring device
> > has seen a posted write, are related but different things, no?
> yes, they are different and wmb guarantees both.
No, wmb() doesn't. I'd be very surprised if it had any side effect on
the PCI bus even on ARM. Read Documentation/memory-barriers.txt.
And to understand (PCI) posted writes, wikipedia helps:
http://en.wikipedia.org/wiki/Posted_write
johannes
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