DMAR faults?

[Michal Kazior]

On 28 October 2013 10:21, Kalle Valo <kvalo at qca.qualcomm.com> wrote:
> Ben Greear <greearb at candelatech.com> writes:
>
>> Any idea what this means?  The 05:00.0 is the ath10k device...
>>
>> ath10k_pci 0000:05:00.0: BAR 0: assigned [mem 0xf4400000-0xf45fffff 64bit]
>> ath10k: MSI-X interrupt handling (8 intrs)
>> dmar: DRHD: handling fault status reg 3
>> dmar: DMAR:[DMA Write] Request device [05:00.0] fault addr ffe46000
>> DMAR:[fault reason 02] Present bit in context entry is clear
>
> I guess you have iommu enabled? I think that means ath10k device tried
> to write to a memory area which was not mapped by the driver.

>From what I understand this is what supposedly can happen when cold
booting the hw 2.0.


>> ath10k: Hardware name qca988x hw2.0 version 0x4100016c
>> ath10k: UART prints disabled
>> ath10k: firmware 999.999.0.636 booted
>> ath10k: htt target version 2.1
>> ath10k: Completion buffers are full
>
> Timestamps would be really useful. How fast did you get that completion
> buffers are full message?

I'm wondering what CE ring buffer this is reported for. Judging from
Ben's recent reports I'd guess this can be an unsolicited interrupt
for an unused CE which doesn't have completions allocated at all --
thus this message is printed.


Michał