[Pcsclite-muscle] HELP! Any experience on smart card chip wearing?

[Sebastien Lorquet]

Hello,

Le 08/09/2014 10:46, Umberto Rustichelli a ?crit :
>> Accordiong to Wikipedia a typical EEPROM supports 1 million of
>> read/write/erase cycles. So I am not surprised that you get errors
>> after a few millions signatures.
> 
> Is still EEPROM in use? Shouldn't it be Flash now?
> I'm not familiar with the industry.
> Anyway, that is the direction I was pointing to.
> But is EEPROM or flash used during signature operations (or the involved
> communitaction operations)?

You are right. Most new cards are now flash based, which worsens your problem
since wear leveling is not always implemented, and flash is far less reliable
than EEPROM (100k writes instead of a million)

Some cards still contain EEPROM memory for NV *data* storage.

My opinion is that your card is "touching" the NV memory, and there is a lot of
possible causes, the most probable is that the card increments an usage counter,
but it could also a bug, and only the OS developers will be able to know it.

You never know, but I don't believe a reader is a problem here. If you want to
check that, why not execute millions of "READ" operations on the card? A simple
enough read operation (e.g. don't use a cryptographically wrapped command, which
may involve usage counters) will not likely touch the NVM. An alternative is GET
CHALLENGE (if available), if you're lucky  enough this command will only store
random bytes in a RAM buffer.

If the card is flash based, the reset operation may trigger a "flash repair"
code, but as time goes by,  more and more blocks will wear, and the flash repair
code will not be able to find usable blocks.

You need detailed information on the card to track the real cause. Which is, as
you said, easier said than done.

best regards,

S?bastien Lorquet