<div dir="ltr"><div><div><div><div><div>i have mention "add debug info" on comment. or you suggest me<br></div>move the debug info into another patch.<br><br></div>about num_chipselect. now we should use gpio pin as chip select<br></div>pin. so there is no limit on num_chipselect. we can connect more<br></div>spi devices by using gpio pin as chip select pin. you can check<br>spi_set_cs function.<br></div></div><div class="gmail_extra"><br><div class="gmail_quote">2015-10-14 12:24 GMT+08:00 John Crispin <span dir="ltr"><<a href="mailto:blogic@openwrt.org" target="_blank">blogic@openwrt.org</a>></span>:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">2 comments inline<br>
<div><div class="h5"><br>
On 11/10/2015 05:54, Michael Lee wrote:<br>
> * use chip select register to control chip select function instead of<br>
> use chip select polarity<br>
> * should support use gpio as cs pin<br>
> * deselected the spi device when setup and add debug info<br>
><br>
> Signed-off-by: Michael Lee <<a href="mailto:igvtee@gmail.com">igvtee@gmail.com</a>><br>
> ---<br>
> ...0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch | 95 ++++++++++++++++------<br>
> 1 file changed, 68 insertions(+), 27 deletions(-)<br>
><br>
> diff --git a/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch b/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch<br>
> index d1067ea..1b2476c 100644<br>
> --- a/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch<br>
> +++ b/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch<br>
> @@ -25,7 +25,7 @@<br>
> obj-$(CONFIG_SPI_OC_TINY) += spi-oc-tiny.o<br>
> --- /dev/null<br>
> +++ b/drivers/spi/spi-mt7621.c<br>
> -@@ -0,0 +1,582 @@<br>
> +@@ -0,0 +1,623 @@<br>
> +/*<br>
> + * spi-mt7621.c -- MediaTek MT7621 SPI controller driver<br>
> + *<br>
> @@ -53,6 +53,7 @@<br>
> +#include <linux/of_device.h><br>
> +#include <linux/platform_device.h><br>
> +#include <linux/swab.h><br>
> ++#include <linux/gpio.h><br>
> +<br>
> +#include <ralink_regs.h><br>
> +<br>
> @@ -208,30 +209,26 @@<br>
> + return (prescale << SPIMASTER_CLKSEL_OFFSET);<br>
> +}<br>
> +<br>
> -+static void mt7621_spi_reset(struct mt7621_spi *rs, int duplex)<br>
> ++static void mt7621_spi_set_cs(struct spi_device *spi, bool enable)<br>
> +{<br>
> -+ u32 master = mt7621_spi_read(rs, MT7621_SPI_MASTER);<br>
> -+<br>
> -+ master |= 7 << 29;<br>
> -+ master |= 1 << 2;<br>
> -+ if (duplex)<br>
> -+ master |= 1 << 10;<br>
> -+ else<br>
> -+ master &= ~(1 << 10);<br>
> ++ struct mt7621_spi *rs = spidev_to_mt7621_spi(spi);<br>
> ++ u32 reg;<br>
> +<br>
> -+ mt7621_spi_write(rs, MT7621_SPI_MASTER, master);<br>
> -+}<br>
> ++ if (spi->mode & SPI_CS_HIGH)<br>
> ++ enable = !enable;<br>
> ++ enable = !enable;<br>
> +<br>
> -+static void mt7621_spi_set_cs(struct spi_device *spi, int enable)<br>
> -+{<br>
> -+ struct mt7621_spi *rs = spidev_to_mt7621_spi(spi);<br>
> -+ int cs = spi->chip_select;<br>
> -+ u32 polar = 0;<br>
> ++ reg = mt7621_spi_read(rs, MT7621_SPI_MASTER);<br>
> ++ reg &= ~(SPIMASTER_CS_MASK << SPIMASTER_CS_OFFSET);<br>
> +<br>
> -+ mt7621_spi_reset(rs, cs);<br>
> + if (enable)<br>
> -+ polar = BIT(cs);<br>
> -+ mt7621_spi_write(rs, MT7621_SPI_POLAR, polar);<br>
> ++ reg |= (spi->chip_select << SPIMASTER_CS_OFFSET);<br>
> ++ else {<br>
> ++ /* when disable just enable cs 8 instead */<br>
> ++ reg |= (SPIMASTER_CS_MASK << SPIMASTER_CS_OFFSET);<br>
> ++ }<br>
> ++<br>
> ++ mt7621_spi_write(rs, MT7621_SPI_MASTER, reg);<br>
> +}<br>
> +<br>
> +static inline int mt7621_spi_wait_ready(struct mt7621_spi *rs, int len)<br>
> @@ -247,6 +244,47 @@<br>
> + return -ETIMEDOUT;<br>
> +}<br>
> +<br>
> ++static void mt7621_dump_reg(struct spi_master *master, const char *func)<br>
> ++{<br>
> ++ struct mt7621_spi *rs = spi_master_get_devdata(master);<br>
> ++<br>
> ++ dev_dbg(&master->dev, "%s trans: %08x, opcode: %08x, data0: %08x, "<br>
> ++ "data1: %08x, data2: %08x, data3: %08x, " \<br>
> ++ "data4: %08x, data5: %08x, data6: %08x, " \<br>
> ++ "data7: %08x, master: %08x, morebuf: %08x, " \<br>
> ++ "qctl: %08x, status: %08x, polar: %08x, " \<br>
> ++ "space: %08x\n",<br>
> ++ func,<br>
> ++ mt7621_spi_read(rs, MT7621_SPI_TRANS),<br>
> ++ mt7621_spi_read(rs, MT7621_SPI_OPCODE),<br>
> ++ mt7621_spi_read(rs, MT7621_SPI_DATA0),<br>
> ++ mt7621_spi_read(rs, MT7621_SPI_DATA0 + 4),<br>
> ++ mt7621_spi_read(rs, MT7621_SPI_DATA0 + 8),<br>
> ++ mt7621_spi_read(rs, MT7621_SPI_DATA0 + 12),<br>
> ++ mt7621_spi_read(rs, MT7621_SPI_DATA0 + 16),<br>
> ++ mt7621_spi_read(rs, MT7621_SPI_DATA0 + 20),<br>
> ++ mt7621_spi_read(rs, MT7621_SPI_DATA0 + 24),<br>
> ++ mt7621_spi_read(rs, MT7621_SPI_DATA0 + 28),<br>
> ++ mt7621_spi_read(rs, MT7621_SPI_MASTER),<br>
> ++ mt7621_spi_read(rs, MT7621_SPI_MOREBUF),<br>
> ++ mt7621_spi_read(rs, MT7621_SPI_QUEUE_CTL),<br>
> ++ mt7621_spi_read(rs, MT7621_SPI_STATUS),<br>
> ++ mt7621_spi_read(rs, MT7621_SPI_POLAR),<br>
> ++ mt7621_spi_read(rs, MT7621_SPI_SPACE));<br>
> ++}<br>
<br>
</div></div>this is an unrelated part in the patch.<br>
<div><div class="h5"><br>
<br>
> ++<br>
> ++/* copy from spi.c */<br>
> ++static void spi_set_cs(struct spi_device *spi, bool enable)<br>
> ++{<br>
> ++ if (spi->mode & SPI_CS_HIGH)<br>
> ++ enable = !enable;<br>
> ++<br>
> ++ if (spi->cs_gpio >= 0)<br>
> ++ gpio_set_value(spi->cs_gpio, !enable);<br>
> ++ else if (spi->master->set_cs)<br>
> ++ spi->master->set_cs(spi, !enable);<br>
> ++}<br>
> ++<br>
> +static int mt7621_spi_transfer_half_duplex(struct spi_master *master,<br>
> + struct spi_message *m)<br>
> +{<br>
> @@ -297,7 +335,7 @@<br>
> + val |= (rx_len * 8) << 12;<br>
> + mt7621_spi_write(rs, MT7621_SPI_MOREBUF, val);<br>
> +<br>
> -+ mt7621_spi_set_cs(spi, 1);<br>
> ++ spi_set_cs(spi, true);<br>
> +<br>
> + val = mt7621_spi_read(rs, MT7621_SPI_TRANS);<br>
> + val |= SPITRANS_START;<br>
> @@ -305,7 +343,7 @@<br>
> +<br>
> + mt7621_spi_wait_ready(rs, 36);<br>
> +<br>
> -+ mt7621_spi_set_cs(spi, 0);<br>
> ++ spi_set_cs(spi, false);<br>
> +<br>
> + for (i = 0; i < rx_len; i += 4)<br>
> + data[i / 4] = mt7621_spi_read(rs, MT7621_SPI_DATA0 + i);<br>
> @@ -377,7 +415,7 @@<br>
> + val |= (rx_len * 8) << 12;<br>
> + mt7621_spi_write(rs, MT7621_SPI_MOREBUF, val);<br>
> +<br>
> -+ mt7621_spi_set_cs(spi, 1);<br>
> ++ spi_set_cs(spi, true);<br>
> +<br>
> + val = mt7621_spi_read(rs, MT7621_SPI_TRANS);<br>
> + val |= SPITRANS_START;<br>
> @@ -385,7 +423,7 @@<br>
> +<br>
> + mt7621_spi_wait_ready(rs, 36);<br>
> +<br>
> -+ mt7621_spi_set_cs(spi, 0);<br>
> ++ spi_set_cs(spi, false);<br>
> +<br>
> + for (i = 0; i < rx_len; i += 4)<br>
> + data[i / 4] = mt7621_spi_read(rs, MT7621_SPI_DATA4 + i);<br>
> @@ -451,6 +489,11 @@<br>
> + /* enable more buffer mode */<br>
> + mt7621_spi_setbits(rs, MT7621_SPI_MASTER, SPIMASTER_MB_MODE);<br>
> +<br>
> ++ /* deselected the spi device */<br>
> ++ spi_set_cs(spi, false);<br>
> ++<br>
> ++ mt7621_dump_reg(master, __func__);<br>
> ++<br>
> + return 0;<br>
> +}<br>
> +<br>
> @@ -547,8 +590,8 @@<br>
> + master->flags = SPI_MASTER_HALF_DUPLEX;<br>
> + master->setup = mt7621_spi_setup;<br>
> + master->prepare_message = mt7621_spi_prepare_message;<br>
> ++ master->set_cs = mt7621_spi_set_cs;<br>
> + master->transfer_one_message = mt7621_spi_transfer_one_message;<br>
> -+ master->num_chipselect = 2;<br>
<br>
</div></div>i dont think you really want to remove that line.<br>
<div class="HOEnZb"><div class="h5"><br>
<br>
<br>
<br>
> +<br>
> + dev_set_drvdata(&pdev->dev, master);<br>
> +<br>
> @@ -559,8 +602,6 @@<br>
> +<br>
> + device_reset(&pdev->dev);<br>
> +<br>
> -+ mt7621_spi_reset(rs, 0);<br>
> -+<br>
> + ret = devm_spi_register_master(&pdev->dev, master);<br>
> + if (ret < 0) {<br>
> + dev_err(&pdev->dev, "devm_spi_register_master error.\n");<br>
><br>
</div></div></blockquote></div><br></div>