[OpenWrt-Devel] [PATCH 2/2] ath79: fix qca955x dual pci resource allocation

[Philippe Mathieu-Daudé]

On 1/29/19 5:12 AM, Santiago Piccinini wrote:
> Tested with a dual pci QCA9558 board (LibreRouter v1) in three
> configurations: enabling pcie0 only, pcie1 only and both enabled.
> 
> Signed-off-by: Santiago Piccinini <spiccinini at altermundi.net>
> ---
>  target/linux/ath79/dts/qca9557.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/target/linux/ath79/dts/qca9557.dtsi b/target/linux/ath79/dts/qca9557.dtsi
> index 541aa6916e..77e5a316dd 100644
> --- a/target/linux/ath79/dts/qca9557.dtsi
> +++ b/target/linux/ath79/dts/qca9557.dtsi
> @@ -209,7 +209,7 @@
>  				      <0x16000000 0x1000>; /* CFG */
>  				reg-names = "crp_base", "ctrl_base", "cfg_base";
>  				ranges = <0x2000000 0 0x12000000 0x12000000 0 0x02000000	/* pci memory */
> -					  0x1000000 0 0x00000000 0x0000000 0 0x000001>;		/* io space */
> +					  0x1000000 0 0x00000000 0x0000001 0 0x000001>;		/* io space */

This host range is indeed already registered for pcie0.
However I wonder if registering this I/O range make sense at all.
(Also, see my question on patch 1/2 of this series remapping this into
the DDR addr space).

>  				interrupt-parent = <&intc3>;
>  				interrupts = <0>;
>  
> 

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