[OpenWrt-Devel] [PATCH 5/7] ramips: fix mt7621 cpu clock speed. set spi clock to system clock

[John Crispin]

On 05/10/2015 12:29, Mingyu Li wrote:
> according to mtk sdk 4300 at kernel version linux-2.6.36.x
> at 40Mhz Xtal it use 20 not 40.
> 
> #elif defined (CONFIG_RALINK_MT7621)
>         case 0:
>                 reg = (*(volatile u32 *)(RALINK_SYSCTL_BASE + 0x44));
>                 cpu_fdiv = ((reg >> 8) & 0x1F);
>                 cpu_ffrac = (reg & 0x1F);
>                 mips_cpu_feq = (500 * cpu_ffrac / cpu_fdiv) * 1000 * 1000;
>                 break;
>         case 1: //CPU PLL
>                 reg = (*(volatile u32 *)(RALINK_MEMCTRL_BASE + 0x648));
>                 fbdiv = ((reg >> 4) & 0x7F) + 1;
>                 reg = (*(volatile u32 *)(RALINK_SYSCTL_BASE + 0x10));
>                 reg = (reg >> 6) & 0x7;
>                 if(reg >= 6) { //25Mhz Xtal
>                         mips_cpu_feq = 25 * fbdiv * 1000 * 1000;
>                 } else if(reg >=3) { //40Mhz Xtal
>                         mips_cpu_feq = 20 * fbdiv * 1000 * 1000;
>                 } else { // 20Mhz Xtal
>                         /* TODO */
>                 }
>                 break;
> #elif defined (CONFIG_RALINK_MT7628)
> 


ok, will look at the datasheet later on today to verify this

	JOhn
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