[PATCH] platform: generic: metanoia/mt2824: configure PMA for DSP memory regions

[Anup Patel]

On Wed, Sep 2, 2026 at 8:34 PM Benoît Monin <benoit.monin at bootlin.com> wrote:
>
> Set up the memory attribute for the XOR RAM, MRAS memory, and RSC table
> used by the DSPs as non-cacheable and bufferable during final init.
>
> Signed-off-by: Benoît Monin <benoit.monin at bootlin.com>

No one from Andes or Metanoia commented so I guess they are fine with
this patch. From my perspective, this looks good to me.

Reviewed-by: Anup Patel <anup at brainfault.org>

Applied this patch to the riscv/opensbi repo.

Thanks,
Anup

> ---
>  platform/generic/metanoia/mt2824/mt2824.c | 47 +++++++++++++++++++++++++++++++
>  1 file changed, 47 insertions(+)
>
> diff --git a/platform/generic/metanoia/mt2824/mt2824.c b/platform/generic/metanoia/mt2824/mt2824.c
> index a34304b9..970e15e7 100644
> --- a/platform/generic/metanoia/mt2824/mt2824.c
> +++ b/platform/generic/metanoia/mt2824/mt2824.c
> @@ -6,13 +6,60 @@
>   *      Jun Chang <jun.chang at metanoia-comm.com>
>   */
>
> +#include <andes/andes_pma.h>
>  #include <andes/andes_pmu.h>
>  #include <andes/andes_sbi.h>
>  #include <platform_override.h>
> +#include <sbi_utils/fdt/fdt_helper.h>
> +
> +#define MT2824_XOR_RAM_BASE            0x00100000ULL
> +#define MT2824_XOR_RAM_SIZE            0x00040000ULL
> +
> +#define MT2824_MRAS_MEM_BASE           0x60000000ULL
> +#define MT2824_MRAS_MEM_SIZE           0x20000000ULL
> +
> +#define MT2824_RSCTABLE_BASE           0x81000000ULL
> +#define MT2824_RSCTABLE_SIZE           0x00010000ULL
> +
> +static const struct andes_pma_region metanoia_mt2824_pma_regions[] = {
> +       {
> +               .pa = MT2824_XOR_RAM_BASE,
> +               .size = MT2824_XOR_RAM_SIZE,
> +               .flags = ANDES_PMACFG_ETYP_NAPOT |
> +                        ANDES_PMACFG_MTYP_MEM_NON_CACHE_BUF,
> +       },
> +       {
> +               .pa = MT2824_MRAS_MEM_BASE,
> +               .size = MT2824_MRAS_MEM_SIZE,
> +               .flags = ANDES_PMACFG_ETYP_NAPOT |
> +                        ANDES_PMACFG_MTYP_MEM_NON_CACHE_BUF,
> +       },
> +        {
> +               .pa = MT2824_RSCTABLE_BASE,
> +               .size = MT2824_RSCTABLE_SIZE,
> +               .flags = ANDES_PMACFG_ETYP_NAPOT |
> +                        ANDES_PMACFG_MTYP_MEM_NON_CACHE_BUF,
> +        },
> +};
> +
> +static int metanoia_mt2824_final_init(bool cold_boot)
> +{
> +       void *fdt = fdt_get_address_rw();
> +       int rc;
> +
> +       /* Set the DSP memory regions attributes */
> +       rc = andes_pma_setup_regions(fdt, metanoia_mt2824_pma_regions,
> +                                    array_size(metanoia_mt2824_pma_regions));
> +       if (rc)
> +               return rc;
> +
> +       return generic_final_init(cold_boot);
> +}
>
>  static int metanoia_mt2824_platform_init(const void *fdt, int nodeoff,
>                                         const struct fdt_match *match)
>  {
> +       generic_platform_ops.final_init = metanoia_mt2824_final_init;
>         generic_platform_ops.extensions_init = andes_pmu_extensions_init;
>         generic_platform_ops.pmu_init = andes_pmu_init;
>         generic_platform_ops.vendor_ext_provider = andes_sbi_vendor_ext_provider;
>
> ---
> base-commit: 35511bc6ee1c9c17b6a89b44c52e2044bb51b979
> change-id: 20260902-mt2824-pma-f09c4965c4e9
>
> Best regards,
> --
> Benoît Monin, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com
>