[PATCH v2 0/9] Add RISC-V Worlds ISA support to OpenSBI
Krzysztof Kozlowski
krzk at kernel.org
Mon Sep 28 04:33:17 PDT 2026
On 17/08/2026 11:04, Yu-Chien Peter Lin wrote:
> This patch series adds support for RISC-V Worlds ISA extensions,
> enabling hardware-enforced isolation boundaries based on World IDs
> by extending the OpenSBI domain framework.
>
> Trust Model and Boot-time Roles
> --------------------------------
>
> The implementation follows the two-phase M-mode trust model:
>
> - RoT M-mode phase: Prior boot stage (ROM/SPL) that may program mwid and
> mlwidlist and lock mwid before handing off to OpenSBI.
>
> - Regular M-mode phase (OpenSBI): Treats pmwid/pmwidlist/pmlwidlist as
> input policy from hardware/RoT. Locks mwid to prevent later M-mode code
> from changing its own WID. Programs per-domain mlwid/mwiddeleg based on
> DT configuration.
>
> Device Tree Bindings
> ---------------------
>
> Per-hart properties defined in linux kernel DT bindings v3 [1]:
> - riscv,pmwid: M-mode World ID
> - riscv,pmwidlist: M-mode permitted WID bitmap
> - riscv,pmlwidlist: S/U-mode permitted WID bitmap>
> Per-domain properties (see domain_support.md):
> - wid: S-mode WID for this domain
> - widdeleg: WID delegation bitmap for this domain
I don't understand why I am cc-ed here, why DT is described here but not
in the bindings and why do you reference some RFC (which means: not
READY for review) patchset in a different patchset which is ready for
review.
Best regards,
Krzysztof
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