[RFC PATCH 3/5] lib: sbi: Save optional H-extension context

[whensun]

From: Theodorus Wensan Februanto <theodoruswensanfebruanto025 at gmail.com>

Preserve hypervisor interrupt enable state provided by Smaia and
hypervisor state-enable CSRs provided by Smstateen.

Use extension checks so systems without these CSRs are unaffected.
The 64-bit helper preserves the corresponding high-half CSRs on RV32.

Link: https://github.com/riscv-software-src/opensbi/issues/433
Signed-off-by: Theodorus Wensan Februanto <theodoruswensanfebruanto025 at gmail.com>
---
 lib/sbi/sbi_domain_context.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/lib/sbi/sbi_domain_context.c b/lib/sbi/sbi_domain_context.c
index caec5486..32ff365b 100644
--- a/lib/sbi/sbi_domain_context.c
+++ b/lib/sbi/sbi_domain_context.c
@@ -56,6 +56,9 @@ struct hart_context {
 	unsigned long htinst;
 	unsigned long hvip;
 	unsigned long hgatp;
+	/** Optional hypervisor state */
+	u64 hvien;
+	u64 hstateen[4];
 #if __riscv_xlen == 32
 	unsigned long hidelegh;
 	unsigned long hviph;
@@ -176,6 +179,19 @@ static int switch_to_next_domain_context(struct hart_context *ctx,
 			ctx->hviph = csr_swap(CSR_HVIPH, dom_ctx->hviph);
 		}
 #endif
+		if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMAIA))
+			ctx->hvien = csr_swap64(CSR_HVIEN, dom_ctx->hvien);
+
+		if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMSTATEEN)) {
+			ctx->hstateen[0] = csr_swap64(CSR_HSTATEEN0,
+						dom_ctx->hstateen[0]);
+			ctx->hstateen[1] = csr_swap64(CSR_HSTATEEN1,
+						dom_ctx->hstateen[1]);
+			ctx->hstateen[2] = csr_swap64(CSR_HSTATEEN2,
+						dom_ctx->hstateen[2]);
+			ctx->hstateen[3] = csr_swap64(CSR_HSTATEEN3,
+						dom_ctx->hstateen[3]);
+		}
 	}
 	if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_10)
 		ctx->scounteren = csr_swap(CSR_SCOUNTEREN, dom_ctx->scounteren);
-- 
2.43.0