[PATCH v5 1/9] lib: sbi_hart: add RISC-V Worlds ISA extensions
Pawandeep Oza
pawandeep.oza at oss.qualcomm.com
Tue Nov 10 10:48:31 PST 2026
On Tue, Nov 10, 2026 at 1:50 AM Yu-Chien Peter Lin <peter.lin at sifive.com> wrote:
>
> Add CSR definitions for RISC-V Worlds (mwid, mlwid, mlwidlist,
> mwiddeleg, slwid).
>
> Signed-off-by: Yu-Chien Peter Lin <peter.lin at sifive.com>
> Reviewed-by: Anup Patel <anup at brainfault.org>
> ---
> Changes v4->v5:
> - No change
> ---
> include/sbi/riscv_encoding.h | 12 ++++++++++++
> include/sbi/sbi_hart.h | 10 ++++++++++
> lib/sbi/sbi_hart.c | 5 +++++
> 3 files changed, 27 insertions(+)
>
> diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
> index ffe7666c..e0262bfc 100644
> --- a/include/sbi/riscv_encoding.h
> +++ b/include/sbi/riscv_encoding.h
> @@ -400,6 +400,9 @@
> /* Supervisor Resource Management Configuration CSRs */
> #define CSR_SRMCFG 0x181
>
> +/* Supervisor lower-privilege mode World ID CSR (Sswid) */
> +#define CSR_SLWID 0x190
> +
> /* Machine-Level Control transfer records CSRs */
> #define CSR_MCTRCTL 0x34e
>
> @@ -520,6 +523,15 @@
> #define CSR_MTINST 0x34a
> #define CSR_MTVAL2 0x34b
>
> +/* Machine World ID CSRs (Smwid, Smlwid, Smlwidlist, Smwiddeleg) */
> +#define CSR_MLWID 0x390
> +#define CSR_MWID 0x749
> +#define CSR_MWIDDELEG 0x748
> +#define CSR_MLWIDLIST 0x74A
> +
> +/* mwid lock bit */
> +#define MWID_LOCK (_UL(1) << (__riscv_xlen - 1))
> +
> /* Machine Memory Protection */
> #define CSR_PMPCFG0 0x3a0
> #define CSR_PMPCFG1 0x3a1
> diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
> index a020cf03..ed344783 100644
> --- a/include/sbi/sbi_hart.h
> +++ b/include/sbi/sbi_hart.h
> @@ -97,6 +97,16 @@ enum sbi_hart_extensions {
> SBI_HART_EXT_F,
> /** Hart has D extension */
> SBI_HART_EXT_D,
> + /** Hart has Smwid extension */
> + SBI_HART_EXT_SMWID,
> + /** Hart has Smlwid extension */
> + SBI_HART_EXT_SMLWID,
> + /** Hart has Smlwidlist extension */
> + SBI_HART_EXT_SMLWIDLIST,
> + /** Hart has Smwiddeleg extension */
> + SBI_HART_EXT_SMWIDDELEG,
> + /** Hart has Sswid extension */
> + SBI_HART_EXT_SSWID,
>
> /** Maximum index of Hart extension */
> SBI_HART_EXT_MAX,
> diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
> index d1f5500d..d86abf07 100644
> --- a/lib/sbi/sbi_hart.c
> +++ b/lib/sbi/sbi_hart.c
> @@ -355,6 +355,11 @@ const struct sbi_hart_ext_data sbi_hart_ext[] = {
> __SBI_HART_EXT_DATA(v, SBI_HART_EXT_V),
> __SBI_HART_EXT_DATA(f, SBI_HART_EXT_F),
> __SBI_HART_EXT_DATA(d, SBI_HART_EXT_D),
> + __SBI_HART_EXT_DATA(smwid, SBI_HART_EXT_SMWID),
> + __SBI_HART_EXT_DATA(smlwid, SBI_HART_EXT_SMLWID),
> + __SBI_HART_EXT_DATA(smlwidlist, SBI_HART_EXT_SMLWIDLIST),
> + __SBI_HART_EXT_DATA(smwiddeleg, SBI_HART_EXT_SMWIDDELEG),
> + __SBI_HART_EXT_DATA(sswid, SBI_HART_EXT_SSWID),
> };
>
> _Static_assert(SBI_HART_EXT_MAX == array_size(sbi_hart_ext),
> --
> 2.43.7
>
Reviewed-by: Pawandeep Oza <pawandeep.oza at oss.qualcomm.com>
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