[PATCH 4/4] include: mailbox: rpmi_msgprot: Add RPMI performance domain flag defines

Anup Patel anup at brainfault.org
Sun Jun 7 09:14:27 PDT 2026


On Sat, Mar 28, 2026 at 11:14 AM David E. Garcia Porras
<david.garcia at aheadcomputing.com> wrote:
>
> Add bit-field defines for the RPMI performance domain attributes flags
> and fast-channel attributes flags as specified in the RPMI specification.
> These are needed by platform implementations that provide RPMI
> performance services (e.g. DVFS controllers).
>
> Also add the missing db_write_value field to
> rpmi_perf_get_fast_chn_attr_resp to match the RPMI spec layout.
>
> Signed-off-by: David E. Garcia Porras <david.garcia at aheadcomputing.com>
> ---
>  include/sbi_utils/mailbox/rpmi_msgprot.h | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
>
> diff --git a/include/sbi_utils/mailbox/rpmi_msgprot.h b/include/sbi_utils/mailbox/rpmi_msgprot.h
> index f8b16753..7ce1ca9f 100644
> --- a/include/sbi_utils/mailbox/rpmi_msgprot.h
> +++ b/include/sbi_utils/mailbox/rpmi_msgprot.h
> @@ -830,6 +830,23 @@ struct rpmi_dpwr_get_state_resp {
>         u32 state;
>  };
>
> +#define RPMI_PERF_DOMAIN_ATTRS_FLAGS_MASK (7U << 0)
> +#define RPMI_PERF_DOMAIN_ATTRS_FLAGS_FASTCHANNEL_SUPP_POS 0
> +#define RPMI_PERF_DOMAIN_ATTRS_FLAGS_PERF_LVL_CHG_SUPP_POS 1
> +#define RPMI_PERF_DOMAIN_ATTRS_FLAGS_PERF_LIMIT_CHG_SUPP_POS 2
> +#define RPMI_PERF_DOMAIN_ATTRS_FLAGS_FASTCHANNEL_SUPP (1U << RPMI_PERF_DOMAIN_ATTRS_FLAGS_FASTCHANNEL_SUPP_POS)
> +#define RPMI_PERF_DOMAIN_ATTRS_FLAGS_PERF_LVL_CHG_SUPP (1U << RPMI_PERF_DOMAIN_ATTRS_FLAGS_PERF_LVL_CHG_SUPP_POS)
> +#define RPMI_PERF_DOMAIN_ATTRS_FLAGS_PERF_LIMIT_CHG_SUPP (1U << RPMI_PERF_DOMAIN_ATTRS_FLAGS_PERF_LIMIT_CHG_SUPP_POS)
> +
> +#define RPMI_PERF_FASTCHAN_ATTRS_FLAGS_MASK (7U << 0)
> +#define RPMI_PERF_FASTCHAN_ATTRS_FLAGS_DB_SUPP_POS 0
> +#define RPMI_PERF_FASTCHAN_ATTRS_FLAGS_DB_WIDTH_POS 1
> +#define RPMI_PERF_FASTCHAN_ATTRS_FLAGS_DB_SUPP (1U << RPMI_PERF_FASTCHAN_ATTRS_FLAGS_DB_SUPP_POS)
> +#define RPMI_PERF_FASTCHAN_ATTRS_FLAGS_DB_WIDTH_MASK (3U << RPMI_PERF_FASTCHAN_ATTRS_FLAGS_DB_WIDTH_POS)
> +#define RPMI_PERF_FASTCHAN_ATTRS_FLAGS_DB_WIDTH_8 (0U << RPMI_PERF_FASTCHAN_ATTRS_FLAGS_DB_WIDTH_POS)
> +#define RPMI_PERF_FASTCHAN_ATTRS_FLAGS_DB_WIDTH_16 (1U << RPMI_PERF_FASTCHAN_ATTRS_FLAGS_DB_WIDTH_POS)
> +#define RPMI_PERF_FASTCHAN_ATTRS_FLAGS_DB_WIDTH_32 (2U << RPMI_PERF_FASTCHAN_ATTRS_FLAGS_DB_WIDTH_POS)
> +
>  /** RPMI Performance ServiceGroup Service IDs */
>  enum rpmi_performance_service_id {
>         RPMI_PERF_SRV_ENABLE_NOTIFICATION = 0x01,
> @@ -941,6 +958,7 @@ struct rpmi_perf_get_fast_chn_attr_resp {
>         u32 region_size;
>         u32 db_addr_low;
>         u32 db_addr_high;
> +       u32 db_write_value;
>         u32 db_id_low;
>         u32 db_id_high;
>         u32 db_perserved_low;

The db_id_low, db_id_high, and db_preserved_low are also
not aligned with the RPMI spec hence should be remove.

> --
> 2.43.0
>
>
> --
> opensbi mailing list
> opensbi at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/opensbi

Overall, this patch looks good. I have taken care of the
above comment at the time of merging.

Reviewed-by: Anup Patel <anup at brainfault.org>

Applied this patch to the riscv/opensbi repo.

Thanks,
Anup



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