[PATCH] platform: generic: sophgo: Move SG2042 timer memregion workaround

Anup Patel anup at brainfault.org
Thu Aug 20 08:19:01 PDT 2026


On Tue, Jul 21, 2026 at 8:39 PM Xiang W <wangxiang at iscas.ac.cn> wrote:
>
> Commit 4813a2042096 ("lib: sbi_init: Call hart init and timer init
> before platform early init") reordered the cold/warm boot sequence so
> that sbi_timer_init() runs before sbi_platform_early_init().
>
> The SG2042 platform workaround that merges the 16 separate timer
> regions into a single domain memregion was previously performed in
> early_init().  After the reordering the MTIMER driver therefore adds
> the individual regions first, defeating the purpose of the combined
> region (and wasting PMP entries).
>
> Move the addition of the combined memregion into extensions_init(),
> which is invoked from sbi_hart_init() and consequently still executes
> before sbi_timer_init().
>
> Signed-off-by: Han Gao <gaohan at iscas.ac.cn>
> Signed-off-by: Xiang W <wangxiang at iscas.ac.cn>

LGTM.

Reviewed-by: Anup Patel <anup at brainfault.org>

Applied this patch to the riscv/opensbi repo.

Thanks,
Anup

> ---
>  platform/generic/sophgo/sg2042.c | 32 +++++++++++++++++---------------
>  1 file changed, 17 insertions(+), 15 deletions(-)
>
> diff --git a/platform/generic/sophgo/sg2042.c b/platform/generic/sophgo/sg2042.c
> index ac8840e8..81b28376 100644
> --- a/platform/generic/sophgo/sg2042.c
> +++ b/platform/generic/sophgo/sg2042.c
> @@ -31,21 +31,6 @@ static int sophgo_sg2042_early_init(bool cold_boot)
>
>         thead_register_tlb_flush_trap_handler();
>
> -       /*
> -        * Sophgo sg2042 soc use separate 16 timers while initiating,
> -        * merge them as a single domain to avoid wasting.
> -        */
> -       if (cold_boot)
> -               return sbi_domain_root_add_memrange(
> -                                       (ulong)SOPHGO_SG2042_TIMER_BASE,
> -                                       SOPHGO_SG2042_TIMER_SIZE *
> -                                       SOPHGO_SG2042_TIMER_NUM,
> -                                       MTIMER_REGION_ALIGN,
> -                                       (SBI_DOMAIN_MEMREGION_MMIO |
> -                                        SBI_DOMAIN_MEMREGION_M_READABLE |
> -                                        SBI_DOMAIN_MEMREGION_M_WRITABLE));
> -
> -
>         return 0;
>  }
>
> @@ -57,6 +42,23 @@ static int sophgo_sg2042_extensions_init(bool cold_boot)
>         if (rc)
>                 return rc;
>
> +       /*
> +        * SG2042 has 16 separate timers. Add one combined region before the
> +        * MTIMER driver adds the individual regions.
> +        */
> +       if (cold_boot) {
> +               rc = sbi_domain_root_add_memrange(
> +                               (ulong)SOPHGO_SG2042_TIMER_BASE,
> +                               SOPHGO_SG2042_TIMER_SIZE *
> +                               SOPHGO_SG2042_TIMER_NUM,
> +                               MTIMER_REGION_ALIGN,
> +                               (SBI_DOMAIN_MEMREGION_MMIO |
> +                                SBI_DOMAIN_MEMREGION_M_READABLE |
> +                                SBI_DOMAIN_MEMREGION_M_WRITABLE));
> +               if (rc)
> +                       return rc;
> +       }
> +
>         thead_c9xx_register_pmu_device();
>         return 0;
>  }
> --
> 2.47.3
>



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