[PATCH] platform: generic: andes: add QiLai SoC
Anup Patel
anup at brainfault.org
Tue Sep 30 05:21:24 PDT 2025
On Thu, Aug 14, 2025 at 9:01 PM Ben Zong-You Xie <ben717 at andestech.com> wrote:
>
> Extend generic platform to support Andes QiLai SoC
>
> Signed-off-by: Ben Zong-You Xie <ben717 at andestech.com>
LGTM.
There were minor compile errors observed when compiling
OpenSBI for RV32 which I have taken care of at the time of
merging this patch.
Reviewed-by: Anup Patel <anup at brainfault.org>
Applied this patch to the riscv/opensbi repo.
Thanks,
Anup
> ---
> platform/generic/Kconfig | 7 +++
> platform/generic/andes/objects.mk | 2 +
> platform/generic/andes/qilai.c | 66 ++++++++++++++++++++++
> platform/generic/configs/defconfig | 1 +
> platform/generic/include/andes/andes_pma.h | 1 +
> platform/generic/include/andes/qilai.h | 18 ++++++
> 6 files changed, 95 insertions(+)
> create mode 100644 platform/generic/andes/qilai.c
> create mode 100644 platform/generic/include/andes/qilai.h
>
> diff --git a/platform/generic/Kconfig b/platform/generic/Kconfig
> index a24d6ab2fe46..e1d6be563aa7 100644
> --- a/platform/generic/Kconfig
> +++ b/platform/generic/Kconfig
> @@ -36,6 +36,13 @@ config PLATFORM_ANDES_AE350
> select ANDES_PMA
> default n
>
> +config PLATFORM_ANDES_QILAI
> + bool "Andes QiLai support"
> + select ANDES_PMU
> + select ANDES_PMA
> + select ANDES_SBI
> + default n
> +
> config PLATFORM_RENESAS_RZFIVE
> bool "Renesas RZ/Five support"
> select ANDES_PMA
> diff --git a/platform/generic/andes/objects.mk b/platform/generic/andes/objects.mk
> index 15e618529c44..132e20f2f16f 100644
> --- a/platform/generic/andes/objects.mk
> +++ b/platform/generic/andes/objects.mk
> @@ -3,7 +3,9 @@
> #
>
> carray-platform_override_modules-$(CONFIG_PLATFORM_ANDES_AE350) += andes_ae350
> +carray-platform_override_modules-$(CONFIG_PLATFORM_ANDES_QILAI) += andes_qilai
> platform-objs-$(CONFIG_PLATFORM_ANDES_AE350) += andes/ae350.o andes/sleep.o
> +platform-objs-$(CONFIG_PLATFORM_ANDES_QILAI) += andes/qilai.o
>
> platform-objs-$(CONFIG_ANDES_PMA) += andes/andes_pma.o
> platform-objs-$(CONFIG_ANDES_SBI) += andes/andes_sbi.o
> diff --git a/platform/generic/andes/qilai.c b/platform/generic/andes/qilai.c
> new file mode 100644
> index 000000000000..a73ba993215e
> --- /dev/null
> +++ b/platform/generic/andes/qilai.c
> @@ -0,0 +1,66 @@
> +/*
> + * SPDX-License-Identifier: BSD-2-Clause
> + *
> + * Copyright (c) 2025 Andes Technology Corporation
> + *
> + */
> +
> +#include <andes/andes_pma.h>
> +#include <andes/andes_pmu.h>
> +#include <andes/andes_sbi.h>
> +#include <andes/qilai.h>
> +#include <platform_override.h>
> +#include <sbi/sbi_domain.h>
> +#include <sbi_utils/fdt/fdt_driver.h>
> +#include <sbi_utils/fdt/fdt_helper.h>
> +
> +static int andes_qilai_final_init(bool cold_boot)
> +{
> +
> + int rc;
> +
> + /*
> + * Set the memory attribute for 3 PCIE endpoint regions,
> + * and they are all non-idempotent and non-bufferable.
> + */
> + rc = andes_sbi_set_pma(PCIE0_BASE, PCIE0_SIZE,
> + ANDES_PMACFG_ETYP_NAPOT |
> + ANDES_PMACFG_MTYP_DEV_NOBUF);
> + if (rc)
> + return rc;
> +
> + rc = andes_sbi_set_pma(PCIE1_BASE, PCIE1_SIZE,
> + ANDES_PMACFG_ETYP_NAPOT |
> + ANDES_PMACFG_MTYP_DEV_NOBUF);
> + if (rc)
> + return rc;
> +
> + rc = andes_sbi_set_pma(PCIE2_BASE, PCIE2_SIZE,
> + ANDES_PMACFG_ETYP_NAPOT |
> + ANDES_PMACFG_MTYP_DEV_NOBUF);
> + if (rc)
> + return rc;
> +
> + return generic_final_init(cold_boot);
> +}
> +
> +static int andes_qilai_platform_init(const void *fdt, int nodeoff,
> + const struct fdt_match *match)
> +{
> + generic_platform_ops.final_init = andes_qilai_final_init;
> + generic_platform_ops.extensions_init = andes_pmu_extensions_init;
> + generic_platform_ops.pmu_init = andes_pmu_init;
> + generic_platform_ops.vendor_ext_provider =
> + andes_sbi_vendor_ext_provider;
> + return 0;
> +}
> +
> +static const struct fdt_match andes_qilai_match[] = {
> + { .compatible = "andestech,qilai" },
> + {},
> +};
> +
> +const struct fdt_driver andes_qilai = {
> + .match_table = andes_qilai_match,
> + .init = andes_qilai_platform_init,
> +};
> diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
> index c7a6531e04bc..fc09edef8238 100644
> --- a/platform/generic/configs/defconfig
> +++ b/platform/generic/configs/defconfig
> @@ -1,5 +1,6 @@
> CONFIG_PLATFORM_ALLWINNER_D1=y
> CONFIG_PLATFORM_ANDES_AE350=y
> +CONFIG_PLATFORM_ANDES_QILAI=y
> CONFIG_PLATFORM_RENESAS_RZFIVE=y
> CONFIG_PLATFORM_SIFIVE_FU540=y
> CONFIG_PLATFORM_SIFIVE_FU740=y
> diff --git a/platform/generic/include/andes/andes_pma.h b/platform/generic/include/andes/andes_pma.h
> index be6149640c04..5b0ed0acfda8 100644
> --- a/platform/generic/include/andes/andes_pma.h
> +++ b/platform/generic/include/andes/andes_pma.h
> @@ -19,6 +19,7 @@
> #define ANDES_PMACFG_ETYP_NAPOT (3 << ANDES_PMACFG_ETYP_OFFSET)
>
> #define ANDES_PMACFG_MTYP_OFFSET 2
> +#define ANDES_PMACFG_MTYP_DEV_NOBUF (0 << ANDES_PMACFG_MTYP_OFFSET)
> /* Memory, Non-cacheable, Bufferable */
> #define ANDES_PMACFG_MTYP_MEM_NON_CACHE_BUF (3 << ANDES_PMACFG_MTYP_OFFSET)
>
> diff --git a/platform/generic/include/andes/qilai.h b/platform/generic/include/andes/qilai.h
> new file mode 100644
> index 000000000000..dfb0477fcb66
> --- /dev/null
> +++ b/platform/generic/include/andes/qilai.h
> @@ -0,0 +1,18 @@
> +/*
> + * SPDX-License-Identifier: BSD-2-Clause
> + *
> + * Copyright (c) 2025 Andes Technology Corporation
> + *
> + */
> +
> +#ifndef __QILAI_H__
> +#define __QILAI_H__
> +
> +#define PCIE0_BASE 0x1000000000
> +#define PCIE0_SIZE 0x800000000
> +#define PCIE1_BASE 0x1800000000
> +#define PCIE1_SIZE 0x800000000
> +#define PCIE2_BASE 0x2000000000
> +#define PCIE2_SIZE 0x2000000000
> +
> +#endif
> --
> 2.34.1
>
>
> --
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