[PATCH 0/2] Add MIPS P8700 compatibles for ACLINT MSWI and MTIMER

[Benoît Monin]

The ACLINT found in the MIPS P8700 is compliant with the now archived
RISC-V Advanced Core Local Interruptor Specification. There is one
ACLINT controller per cluster, as part of what MIPS calls the coherence
manager.

The MSWI does not require any changes in the code, so only a compatible
string is added.

For the MTIMER, there is no dedicated mtime register to act a reference
in a multi-cluster configuration, and there is no MTIMER without
associated HARTs. A quirk is added to select the first MTIMER to act as
the reference.

Signed-off-by: Benoît Monin <benoit.monin at bootlin.com>
---
Benoît Monin (2):
      lib: utils/ipi: mswi: add MIPS P8700 compatible
      lib: utils/timer: mtimer: add MIPS P8700 compatible

 lib/utils/ipi/fdt_ipi_mswi.c       |  1 +
 lib/utils/timer/fdt_timer_mtimer.c | 10 +++++++++-
 2 files changed, 10 insertions(+), 1 deletion(-)
---
base-commit: e3eb59a396ac55975e3debecfc5b71418eb62248
change-id: 20251008-p8700-aclint-ef8868889745

Best regards,
-- 
Benoît Monin, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com