[PATCH v3 0/4] Initial ESWIN/EIC7700 support
Anup Patel
anup at brainfault.org
Wed Nov 26 06:23:14 PST 2025
On Thu, Nov 20, 2025 at 3:06 PM Bo Gan <ganboing at gmail.com> wrote:
>
> EIC7700 is the SoC used in HiFive P550 and Milk-V Megrez. This SoC is
> currently one of the only off-the-shelf board/chips that support H
> extension, although it's v0.6.1. It also supports pre-ratified N-trace.
> Add support for it so people can benefit from latest OpenSBI features.
>
> The device-tree of HiFive P550 has been upstreamed to Linux:
> https://lore.kernel.org/all/20250825132427.1618089-1-pinkesh.vaghela@einfochips.com/
> However U-boot is not, and there are bugs in vendor U-boot device-tree,
> and also inconsistencies between the two. Thus, this patch is coded with
> the upstreamed device-tree as the reference, but tested with the patched
> vendor U-boot device tree as `FW_FDT_PATH`. The patched vendor U-boot is
> hosted here: https://github.com/ganboing/u-boot-eic7x/tree/eic7x-dt-fix
> Refer to the last PATCH for the instructions on building the firmware
> blob and launch it through UART boot.
>
> The major complication of this chip is that it requires certain memory
> regions to be blocked with PMP entries to prevent speculative execution
> or HW prefetcher from touching the data-cacheable regions within to
> avoid bus errors. Due to the fact that this SoC handles cache incoherent
> DMA by mapping memory twice, one as cached, and the other as uncached,
> we also need an extra PMP to protect the OpenSBI in the uncached portion
> in address space. The PMP handling is tricky, so I documented it very
> extensively for people to reason about it. I managed to get it done with
> only NAPOT PMP entries and still got 1 free PMP for root harts for die 0
> (No free PMP for die 1 root harts). This even permits a udomain/tdomain
> like partitioning, so we can even try out TEEs. Sample boot log:
>
> OpenSBI v1.7-73-g5c235e5d
> ____ _____ ____ _____
> / __ \ / ____| _ \_ _|
> | | | |_ __ ___ _ __ | (___ | |_) || |
> | | | | '_ \ / _ \ '_ \ \___ \| _ < | |
> | |__| | |_) | __/ | | |____) | |_) || |_
> \____/| .__/ \___|_| |_|_____/|____/_____|
> | |
> |_|
>
> Platform Name : SiFive HiFive Premier P550
> Platform Features : medeleg
> Platform HART Count : 4
> Platform IPI Device : aclint-mswi
> Platform Timer Device : aclint-mtimer @ 1000000Hz
> Platform Console Device : uart8250
> Platform HSM Device : ---
> Platform PMU Device : ---
> Platform Reboot Device : eic770x_reset
> Platform Shutdown Device : ---
> Platform Suspend Device : ---
> Platform CPPC Device : ---
> Firmware Base : 0x80000000
> Firmware Size : 613 KB
> Firmware RW Offset : 0x80000
> Firmware RW Size : 101 KB
> Firmware Heap Offset : 0x8d000
> Firmware Heap Size : 49 KB (total), 1 KB (reserved), 14 KB (used), 33 KB (free)
> Firmware Scratch Size : 4096 B (total), 424 B (used), 3672 B (free)
> Runtime SBI Version : 3.0
> Standard SBI Extensions : time,rfnc,ipi,base,hsm,srst,pmu,dbcn,fwft,legacy,dbtr,sse
> Experimental SBI Extensions : none
>
> Domain0 Name : root
> Domain0 Boot HART : 0
> Domain0 HARTs : 0*,1*,2*,3*
> Domain0 Region00 : 0x0000000080000000-0x00000000800fffff M: (F,R,W,X) S/U: ()
> Domain0 Region01 : 0x000000c000000000-0x000000c0000fffff M: (F,R,W,X) S/U: ()
> Domain0 Region02 : 0x0000000002000000-0x000000000200ffff M: (I,R,W) S/U: ()
> Domain0 Region03 : 0x0000000000000000-0x000000007fffffff M: (I,R,W) S/U: (R,W)
> Domain0 Region04 : 0x0000000000000000-0x0000000fffffffff M: (R,W) S/U: (R,W,X)
> Domain0 Region05 : 0x0000000000000000-0x0000007fffffffff M: (I) S/U: ()
> Domain0 Region06 : 0x0000000000000000-0xffffffffffffffff M: () S/U: (R,W,X)
> Domain0 Next Address : 0x0000000080200000
> Domain0 Next Arg1 : 0x00000000f8000000
> Domain0 Next Mode : S-mode
> Domain0 SysReset : yes
> Domain0 SysSuspend : yes
>
> Domain1 Name : trusted-domain
> Domain1 Boot HART : -1
> Domain1 HARTs :
> Domain1 Region00 : 0x0000000080000000-0x00000000800fffff M: (F,R,W,X) S/U: ()
> Domain1 Region01 : 0x000000c000000000-0x000000c0000fffff M: (F,R,W,X) S/U: ()
> Domain1 Region02 : 0x0000000050910000-0x0000000050910fff M: (I,R,W) S/U: (R,W)
> Domain1 Region03 : 0x0000000002000000-0x000000000200ffff M: (I,R,W) S/U: ()
> Domain1 Region04 : 0x000000047ff00000-0x000000047fffffff M: () S/U: (R,W,X)
> Domain1 Region05 : 0x0000000000000000-0x000000007fffffff M: (I,R,W) S/U: ()
> Domain1 Region06 : 0x0000000000000000-0x0000007fffffffff M: (I) S/U: ()
> Domain1 Next Address : 0x000000047ff00000
> Domain1 Next Arg1 : 0x0000000000000000
> Domain1 Next Mode : S-mode
> Domain1 SysReset : no
> Domain1 SysSuspend : no
>
> Domain2 Name : untrusted-domain
> Domain2 Boot HART : -1
> Domain2 HARTs :
> Domain2 Region00 : 0x0000000080000000-0x00000000800fffff M: (F,R,W,X) S/U: ()
> Domain2 Region01 : 0x000000c000000000-0x000000c0000fffff M: (F,R,W,X) S/U: ()
> Domain2 Region02 : 0x0000000002000000-0x000000000200ffff M: (I,R,W) S/U: ()
> Domain2 Region03 : 0x000000047ff00000-0x000000047fffffff M: () S/U: ()
> Domain2 Region04 : 0x0000000000000000-0x0000000fffffffff M: (R,W) S/U: (R,W,X)
> Domain2 Region05 : 0x0000000000000000-0x0000007fffffffff M: (I) S/U: ()
> Domain2 Region06 : 0x0000000000000000-0xffffffffffffffff M: () S/U: (R,W,X)
> Domain2 Next Address : 0x0000000080000000
> Domain2 Next Arg1 : 0x00000000f8000000
> Domain2 Next Mode : S-mode
> Domain2 SysReset : no
> Domain2 SysSuspend : no
>
> Boot HART ID : 0
> Boot HART Domain : root
> Boot HART Priv Version : v1.11
> Boot HART Base ISA : rv64imafdchx
> Boot HART ISA Extensions : sscofpmf,zihpm,sdtrig
> Boot HART PMP Count : 8
> Boot HART PMP Granularity : 12 bits
> Boot HART PMP Address Bits : 39
> Boot HART MHPM Info : 4 (0x00000078)
> Boot HART Debug Triggers : 4 triggers
> Boot HART MIDELEG : 0x0000000000002666
> Boot HART MEDELEG : 0x0000000000f0b509
>
>
> Signed-off-by: Bo Gan <ganboing at gmail.com>
> ---
> Changes in v3:
> - Figure out the cause behind bus error, and document it properly
> - Drop the consolidation logic and let the lib/memregion logic to
> optimize out unnecessary regions -- simplifies many things.
> - Better and more comprehensive comments in source code.
> - Support tdomain/udomain like use cases on die 0.
>
> Changes in v2:
> - Major enhancement of PMP consolidation logic. Also fixed a Linux
> Panic bug due to the mismatch between PMP settings and reserved
> memory regions passed to Linux via FDT.
> - Also protects the OpenSBI firmware in uncached memory portion of
> address space.
> - More detailed documentation on EIC770X/P550
>
> ---
> Bo Gan (4):
> lib: sbi: allow platform to override PMP (un)configuration
Instead of platform specific PMP (un)configuration override, you
can rebase this series upon "OpenSBI hart protection abstraction"
series and implement EIC770X specific hart protection using PMP.
> lib: sbi: give platform choice of using single memregion to cover
> OpenSBI
> include: sbi_domain: make is_region_subset public
> platform: generic: eswin: add EIC7700
>
> include/sbi/sbi_domain.h | 29 ++
> include/sbi/sbi_hart.h | 3 +
> include/sbi/sbi_platform.h | 74 +++++
> lib/sbi/sbi_domain.c | 80 +++--
> lib/sbi/sbi_domain_context.c | 11 +-
> lib/sbi/sbi_hart.c | 45 ++-
> platform/generic/Kconfig | 5 +
> platform/generic/configs/defconfig | 1 +
> platform/generic/eswin/Kconfig | 29 ++
> platform/generic/eswin/eic770x.c | 385 +++++++++++++++++++++++
> platform/generic/eswin/objects.mk | 11 +
> platform/generic/include/eswin/eic770x.h | 73 +++++
> 12 files changed, 687 insertions(+), 59 deletions(-)
> create mode 100644 platform/generic/eswin/Kconfig
> create mode 100644 platform/generic/eswin/eic770x.c
> create mode 100644 platform/generic/eswin/objects.mk
> create mode 100644 platform/generic/include/eswin/eic770x.h
>
> --
> 2.34.1
>
>
> --
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Regards,
Anup
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