[PATCH] lib: sbi: expected trap must always clear MPRV

[Radim Krčmář]

2025-11-25T12:04:44-08:00, Deepak Gupta <debug at rivosinc.com>:
> On Tue, Nov 25, 2025 at 08:48:35PM +0100, Radim Krčmář wrote:
>>2025-11-25T11:17:29-08:00, Deepak Gupta <debug at rivosinc.com>:
>>> I can modify the commit message to remove security impact (that it seems like
>>> how implementations are implementing it) and re-send it.
>>
>>That would help.  The patch also uses a wrong bitmask for csrc:
>>MPRV is bit 17, but you're clearing bit 5, SPIE.
>>(Isn't it possible to use MSTATUS_MPRV there?)
>
> It's `lui` (load upper immediate). I could just do `li a4, MTSTATUS_PRV`.
> Although its a larger immediate, so most likely assembler will split into
> two instructions or would replace it with `lui`.

Sorry, I missed that.  Yeah, assembler should translate it to just lui.