[PATCH v5 03/10] platform: generic: mips: add an entry function

[Chao-ying Fu]

On Mon, May 19, 2025 at 10:29 PM Anup Patel <anup at brainfault.org> wrote:
>
> On Tue, May 20, 2025 at 3:29 AM Chao-ying Fu <icebergfu at gmail.com> wrote:
> >
> > The entry function is minimum boot code for harts to execute after
> > reset, nmi, cache error, and debug exception.
>
> This does not belong in OpenSBI because it is the job of
> previous booting stage to jump at the right entry point in
> OpenSBI. The previous booting stage also has the
> responsibility of passing the DTB/FDT address to OpenSBI.
>
> Almost all RISC-V platforms have their own early boot
> stage which boots before OpenSBI. Some of these RISCV
> platforms also use U-Boot SPL as their early boot stage.
>
> Regards,
> Anup
Yes, I will remove this file. Thanks!
NOTE: Andes has a similar mechanism to let harts boot to a new entry function.
        .section .text, "ax", %progbits
        .align 3
        .global __ae350_enable_coherency_warmboot
__ae350_enable_coherency_warmboot:
        call ra, __ae350_enable_coherency
        j _start_warm