[PATCH 00/12] Some improvements on boot sequence

Xiang W wxjstz at 126.com
Fri Jun 20 05:21:19 PDT 2025


在 2025-06-16一的 20:20 +0800,Xiang W写道:
> 在 2025-06-16一的 17:25 +0530,Anup Patel写道:
> > On Wed, Jun 11, 2025 at 5:42 PM Xiang W <wxjstz at 126.com> wrote:
> > > 
> > > This series of patches mainly merges init_coldboot and init_warm_startup,
> > 
> > The existing code of having clearly separate coldboot, warm_startup, and
> > warm_resume paths are straightforward to understand and maintain. Even,
> > Linux has separate start_kernel() (for boot/primary HART), smp_callin()
> > (for non-boot/secondary HARTs) and __cpu_resume_enter() (for HART
> > resume).
> > 
> > > and separates sbi_hsm_hart_wait from sbi_hsm_init, so that non-coldboot
> > > HART can perform more initialization tasks before entering HSM wait. In
> > > order to improve some multi HARTs related codes.
> > 
> > Performing more initialization on non-coldboot HART before
> > sbi_hsm_hart_wait() is redundant because non-coldboot HART
> > will have to anyway wait until coldboot HART uses SBI HSM
> > start call.
> > 
> > On the contrary, doing sbi_hsm_hart_wait() as the first thing for
> > non-coldboot HART ensures that HART is fully initialized only
> > after coldboot HART decides to bring it up (via SBI HSM start)
> > which also enables us to poweroff non-coldboot HART on
> > platforms with full hart-hotplug.
> > 
> > > 
> > > Xiang W (12):
> > >   lib: sbi: Add coldboot parameters to some initialization functions
> > >   lib: sbi: Optimise the boot sequence
> > >   lib: sbi: Implement synchronisation and wait between multiple HARTs
> > >   lib: sbi: Remove wait_for_coldboot and wake_coldboot_harts
> > >   lib: sbi: Add wait operations in some initialization functions
> > >   lib/utils: Make fdt_parse_isa_extensions reentrant
> > >   lib: sbi: Initialize as much as possible before sbi_hsm_init
> > >   lib: sbi: Remove cold_boot from sbi_hsm_init
> > >   lib: sbi: Ensure that all Harts complete sbi_hart_init
> > >   lib/utils: Fix Zicntr detection in fdt_cpu_fixup
> > >   lib: sbi: Fix dtbr initialization
> > >   lib: sbi: Remove cold_boot from sbi_double_trap_init
> > 
> > This all seems unnecessary churn and I still find it hard
> > to understand the underlying problem.
> 
> When initialization depends on other HART extensions, the 
> old startup process is completely unaware of other HART 
> extensions.For example, the issues fixed by PATCH10/PATCH11
> /PATCH12 all assume that the extensions supported by HART 
> are the same.

We should assume that asymmetric processors may appear.

asymmetric CPU example: SpacemiT K1

> Two asymmetric CPU Clusters included: Cluster0 integrates Quad 
> RISC-V SpacemiT® X60™Cores with 2.0TOPS AI-Power extension 
> while Cluster1 includes Quad RISC-V SpacemiT® X60™ Cores without
> AI Capability
https://docs.banana-pi.org/en/BPI-F3/SpacemiT_K1_datasheet

AI Capability is achieved through custom extended IME
https://github.com/space-mit/riscv-ime-extension-spec

Regards,
Xiang W
> 
> Regards,
> Xiang W
> > 
> > > 
> > >  include/sbi/sbi_domain.h   |   2 +-
> > >  include/sbi/sbi_hart.h     |   6 +
> > >  include/sbi/sbi_hsm.h      |   5 +-
> > >  include/sbi/sbi_mpxy.h     |   2 +-
> > >  lib/sbi/sbi_dbtr.c         |  32 +++-
> > >  lib/sbi/sbi_domain.c       |   9 +-
> > >  lib/sbi/sbi_double_trap.c  |   7 +-
> > >  lib/sbi/sbi_ecall_dbtr.c   |   2 +-
> > >  lib/sbi/sbi_fwft.c         |   3 +
> > >  lib/sbi/sbi_hart.c         |  77 +++++++++-
> > >  lib/sbi/sbi_hsm.c          |  51 +++----
> > >  lib/sbi/sbi_init.c         | 306 +++++++++++++------------------------
> > >  lib/sbi/sbi_ipi.c          |   3 +
> > >  lib/sbi/sbi_irqchip.c      |   5 +-
> > >  lib/sbi/sbi_mpxy.c         |   4 +-
> > >  lib/sbi/sbi_pmu.c          |   3 +
> > >  lib/sbi/sbi_sse.c          |   3 +
> > >  lib/sbi/sbi_timer.c        |   3 +
> > >  lib/sbi/sbi_tlb.c          |   3 +
> > >  lib/utils/fdt/fdt_fixup.c  |  24 +--
> > >  lib/utils/fdt/fdt_helper.c |   4 +
> > >  21 files changed, 300 insertions(+), 254 deletions(-)
> > > 
> > > --
> > > 2.47.2
> > > 
> > 
> > Regards,
> > Anup
> 




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