[PATCH v6 0/7] Initial ESWIN/EIC7700 and Hifive P550 support

Sun Dec 21 07:38:54 PST 2025

On Thu, Dec 18, 2025 at 4:14 PM Bo Gan <ganboing at gmail.com> wrote:
>
> EIC7700 is the SoC used in HiFive P550 and Milk-V Megrez. This SoC is
> currently one of the only off-the-shelf board/chips that support H
> extension, although it's v0.6.1. It also supports pre-ratified N-trace.
> Add support for it so people can benefit from latest OpenSBI features.
>
> The device-tree of HiFive P550 has been upstreamed to Linux:
> https://lore.kernel.org/all/20250825132427.1618089-1-pinkesh.vaghela@einfochips.com/
> However U-boot is not, and there are bugs in vendor U-boot device-tree,
> and also inconsistencies between the two. Thus, this patch is coded with
> the upstreamed device-tree as the reference, but tested with the patched
> vendor U-boot device tree as `FW_FDT_PATH`. The patched vendor U-boot is
> hosted here: https://github.com/ganboing/u-boot-eic7x/tree/eic7x-dt-fix
> Refer to the last PATCH for the instructions on building the firmware
> blob and launch it through UART boot.
>
> The major complication of this chip is that it requires certain memory
> regions to be blocked with PMP entries to prevent speculative execution
> or HW prefetcher from touching the data-cacheable regions within to
> avoid bus errors. Due to the fact that this SoC handles cache incoherent
> DMA by mapping memory twice, one as cached, and the other as uncached,
> we also need an extra PMP to protect the OpenSBI in the uncached portion
> in address space. The PMP handling is tricky, so I documented it very
> extensively for people to reason about it. I managed to get it done with
> only NAPOT PMP entries and still got 1 free PMP for root harts for die 0
> (No free PMP for die 1 root harts). This even permits a udomain/tdomain
> like partitioning, so we can even try out TEEs. Sample boot log:
>
> OpenSBI v1.7-95-g68b64d77
> Build time: 2025-12-17 05:08:58 -0800
> Build compiler: gcc version 13.2.0 (gc891d8dc23e-dirty)
>    ____                    _____ ____ _____
>   / __ \                  / ____|  _ \_   _|
>  | |  | |_ __   ___ _ __ | (___ | |_) || |
>  | |  | | '_ \ / _ \ '_ \ \___ \|  _ < | |
>  | |__| | |_) |  __/ | | |____) | |_) || |_
>   \____/| .__/ \___|_| |_|_____/|____/_____|
>         | |
>         |_|
>
> Platform Name               : SiFive HiFive Premier P550
> Platform Features           : medeleg
> Platform HART Count         : 4
> Platform HART Protection    : eic7700_pmp
> Platform IPI Device         : aclint-mswi
> Platform Timer Device       : aclint-mtimer @ 1000000Hz
> Platform Console Device     : uart8250
> Platform HSM Device         : ---
> Platform PMU Device         : ---
> Platform Reboot Device      : hfp_reset
> Platform Shutdown Device    : hfp_reset
> Platform Suspend Device     : ---
> Platform CPPC Device        : ---
> Firmware Base               : 0x80000000
> Firmware Size               : 357 KB
> Firmware RW Offset          : 0x40000
> Firmware RW Size            : 101 KB
> Firmware Heap Offset        : 0x4d000
> Firmware Heap Size          : 49 KB (total), 0 KB (reserved), 13 KB (used), 35 KB (free)
> Firmware Scratch Size       : 4096 B (total), 424 B (used), 3672 B (free)
> Runtime SBI Version         : 3.0
> Standard SBI Extensions     : time,rfnc,ipi,base,hsm,srst,pmu,dbcn,fwft,legacy,dbtr,sse
> Experimental SBI Extensions : none
>
> Domain0 Name                : root
> Domain0 Boot HART           : 3
> Domain0 HARTs               : 0*,1*,2*,3*
> Domain0 Region00            : 0x0000000080000000-0x000000008007ffff M: (F,R,W,X) S/U: ()
> Domain0 Region01            : 0x000000c000000000-0x000000c00007ffff M: (I,F,R,W,X) S/U: ()
> Domain0 Region02            : 0x0000000002000000-0x000000000200ffff M: (I,R,W) S/U: ()
> Domain0 Region03            : 0x0000000000000000-0x000000007fffffff M: (I,R,W) S/U: (R,W)
> Domain0 Region04            : 0x0000000000000000-0x0000000fffffffff M: (R,W) S/U: (R,W,X)
> Domain0 Region05            : 0x0000000000000000-0x0000007fffffffff M: (I) S/U: ()
> Domain0 Region06            : 0x0000000000000000-0xffffffffffffffff M: () S/U: (R,W,X)
> Domain0 Next Address        : 0x0000000080200000
> Domain0 Next Arg1           : 0x00000000f8000000
> Domain0 Next Mode           : S-mode
> Domain0 SysReset            : yes
> Domain0 SysSuspend          : yes
>
> Boot HART ID                : 3
> Boot HART Domain            : root
> Boot HART Priv Version      : v1.11
> Boot HART Base ISA          : rv64imafdchx
> Boot HART ISA Extensions    : sscofpmf,zihpm,sdtrig
> Boot HART PMP Count         : 8
> Boot HART PMP Granularity   : 12 bits
> Boot HART PMP Address Bits  : 39
> Boot HART MHPM Info         : 4 (0x00000078)
> Boot HART Debug Triggers    : 4 triggers
> Boot HART MIDELEG           : 0x0000000000002666
> Boot HART MEDELEG           : 0x0000000000f0b509
>
> Signed-off-by: Bo Gan <ganboing at gmail.com>
> ---
> Changes in v6:
> - Fix CPU_DIE_MASK macro
> - Make eic770x build on rv64 only to fix rv32 build error.
> - I'm still waiting for ESWIN's reply on the reset memory corruption
>   issue, but I stress tested the P550 board warm reset overnight,
>   and can confirm the extra sbi_printf indeed mitigated the problem.
>
> Changes in v5:
> - Add Hifive P550 shutdown/reboot support.
> - Add a sbi_printf() just before SoC reset to workaround flaky
>   memory corruption issue after reset. This issue has been reported
>   to ESWIN, and it's been reproduced with their vendor OpenSBI code.
>   ESWIN's actively investigating it.
>
> Changes in v4:
> - Adapt to the hart protection abstraction.
>   Also make use of sbi_hart_pmp_fence for correctness.
> - Specify MMIO flag for the uncached mapping of OpenSBI.
>   It'll avoid adding an extraneous reserved memory region in FDT for S mode.
>
> Changes in v3:
> - Figure out the cause behind bus error, and document it properly
> - Drop the consolidation logic and let the lib/memregion logic to
>   optimize out unnecessary regions -- simplifies many things.
> - Better and more comprehensive comments in source code.
> - Support tdomain/udomain like use cases on die 0.
>
> Changes in v2:
> - Major enhancement of PMP consolidation logic. Also fixed a Linux
>   Panic bug due to the mismatch between PMP settings and reserved
>   memory regions passed to Linux via FDT.
> - Also protects the OpenSBI firmware in uncached memory portion of
>   address space.
> - More detailed documentation on EIC770X/P550
>
> ---
> Bo Gan (7):
>   lib: sbi_hart_pmp: make sbi_hart_pmp_fence public
>   lib: sbi_domain: add sbi_domain_get_oldpmp_flags
>   lib: sbi_domain: make is_region_subset public
>   lib: sbi: give platform choice of using single memregion to cover
>     OpenSBI
>   platform: generic: eswin: add EIC7700
>   lib: utils/serial: Support multiple UART8250 devices
>   platform: generic: eswin: Add shutdown/reboot support for Hifive
>     Premier P550

Applied this series to the riscv/opensbi repo.

Thanks,
Anup