[PATCH 2/8] lib: sbi: use 64 bit csr macros

[Anup Patel]

On Tue, Apr 15, 2025 at 8:13 PM Radim Krčmář <rkrcmar at ventanamicro.com> wrote:
>
> Switch the most obvious cases to new macros.
>
> Signed-off-by: Radim Krčmář <rkrcmar at ventanamicro.com>

LGTM.

Reviewed-by: Anup Patel <anup at brainfault.org>

Regards,
Anup

> ---
>  lib/sbi/sbi_hart.c  | 20 ++++----------------
>  lib/sbi/sbi_timer.c |  7 +------
>  2 files changed, 5 insertions(+), 22 deletions(-)
>
> diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
> index c343805c57cb..2d9ee60fd36c 100644
> --- a/lib/sbi/sbi_hart.c
> +++ b/lib/sbi/sbi_hart.c
> @@ -86,10 +86,7 @@ static void mstatus_init(struct sbi_scratch *scratch)
>         }
>
>         if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMSTATEEN)) {
> -               mstateen_val = csr_read(CSR_MSTATEEN0);
> -#if __riscv_xlen == 32
> -               mstateen_val |= ((uint64_t)csr_read(CSR_MSTATEEN0H)) << 32;
> -#endif
> +               mstateen_val = csr_read64(CSR_MSTATEEN0);
>                 mstateen_val |= SMSTATEEN_STATEN;
>                 mstateen_val |= SMSTATEEN0_CONTEXT;
>                 mstateen_val |= SMSTATEEN0_HSENVCFG;
> @@ -110,17 +107,11 @@ static void mstatus_init(struct sbi_scratch *scratch)
>                 else
>                         mstateen_val &= ~SMSTATEEN0_CTR;
>
> -               csr_write(CSR_MSTATEEN0, mstateen_val);
> -#if __riscv_xlen == 32
> -               csr_write(CSR_MSTATEEN0H, mstateen_val >> 32);
> -#endif
> +               csr_write64(CSR_MSTATEEN0, mstateen_val);
>         }
>
>         if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_12) {
> -               menvcfg_val = csr_read(CSR_MENVCFG);
> -#if __riscv_xlen == 32
> -               menvcfg_val |= ((uint64_t)csr_read(CSR_MENVCFGH)) << 32;
> -#endif
> +               menvcfg_val = csr_read64(CSR_MENVCFG);
>
>                 /* Disable double trap by default */
>                 menvcfg_val &= ~ENVCFG_DTE;
> @@ -156,10 +147,7 @@ static void mstatus_init(struct sbi_scratch *scratch)
>                 if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SVADE))
>                         menvcfg_val &= ~ENVCFG_ADUE;
>
> -               csr_write(CSR_MENVCFG, menvcfg_val);
> -#if __riscv_xlen == 32
> -               csr_write(CSR_MENVCFGH, menvcfg_val >> 32);
> -#endif
> +               csr_write64(CSR_MENVCFG, menvcfg_val);
>
>                 /* Enable S-mode access to seed CSR */
>                 if (sbi_hart_has_extension(scratch, SBI_HART_EXT_ZKR)) {
> diff --git a/lib/sbi/sbi_timer.c b/lib/sbi/sbi_timer.c
> index 86e0db5ab399..998a9a67c2f0 100644
> --- a/lib/sbi/sbi_timer.c
> +++ b/lib/sbi/sbi_timer.c
> @@ -139,12 +139,7 @@ void sbi_timer_event_start(u64 next_event)
>          * the older software to leverage sstc extension on newer hardware.
>          */
>         if (sbi_hart_has_extension(sbi_scratch_thishart_ptr(), SBI_HART_EXT_SSTC)) {
> -#if __riscv_xlen == 32
> -               csr_write(CSR_STIMECMP, next_event & 0xFFFFFFFF);
> -               csr_write(CSR_STIMECMPH, next_event >> 32);
> -#else
> -               csr_write(CSR_STIMECMP, next_event);
> -#endif
> +               csr_write64(CSR_STIMECMP, next_event);
>         } else if (timer_dev && timer_dev->timer_event_start) {
>                 timer_dev->timer_event_start(next_event);
>                 csr_clear(CSR_MIP, MIP_STIP);
> --
> 2.48.1
>
>
> --
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