[PATCH 1/1] lib: sbi_misaligned_ldst: Add handling of vector load/store
Nylon Chen
nylon.chen at sifive.com
Wed Oct 30 20:22:49 PDT 2024
Nylon Chen <nylon.chen at sifive.com> 於 2024年10月18日 週五 上午10:29寫道:
>
> Vivian Wang <uwu at dram.page> 於 2024年10月17日 週四 上午3:34寫道:
> >
> > On 10/16/24 18:35, Nylon Chen wrote:
> > > Add exception handling vector instructions from
> > >
> > > the vector extension to the sbi_misaligned_ldst library.
> > >
> > > This implementation references the misaligned_vec_ldst
> > > implementation in the riscv-pk project.
> > >
> > > Co-developed-by: Zong Li <zong.li at sifive.com>
> > > Signed-off-by: Zong Li <zong.li at sifive.com>
> > > Signed-off-by: Nylon Chen <nylon.chen at sifive.com>
> > > Reviewed-by: Andy Chiu <andy.chiu at sifive.com>
> > > ---
> > > Makefile | 15 +-
> > > include/sbi/riscv_encoding.h | 385 ++++++++++++++++++++++++++++++++++-
> > > include/sbi/sbi_trap_ldst.h | 9 +
> > > lib/sbi/Kconfig | 4 +
> > > lib/sbi/objects.mk | 1 +
> > > lib/sbi/sbi_trap_ldst.c | 23 ++-
> > > lib/sbi/sbi_trap_v_ldst.c | 341 +++++++++++++++++++++++++++++++
> > > 7 files changed, 766 insertions(+), 12 deletions(-)
> > > create mode 100644 lib/sbi/sbi_trap_v_ldst.c
> > >
> > > *snip*
> >
> Hi Vivian, Thank you for your question regarding my patch.
Hi Vivian,
> > I didn't see any mention of mstatus in the patch. Maybe I missed it but
> > since we eventually reload mstatus, we should explicitly set mstatus.VS
> > to "Dirty" (both bits 1) in the saved registers. See [1] for handling of
> > mstatus.FS.
> >
Based on our testing and discussions, we don't need to specifically
set the VS field in mstatus to dirty in this implementation.
This is different from how the emulator handles FP operations.
When it's in the emulator and uses vector-related instructions, these
instructions will automatically set the VS field in mstatus to dirty
at the time of execution.
Thank you again for your input. Please let us know if our
understanding is incorrect. Thank you.
> > [1]: https://patchwork.ozlabs.org/project/opensbi/patch/20230906090114.24625-1-greentime.hu@sifive.com/
> >
> I appreciate your attention to detail, and I will take some time to
> check the specifics you've mentioned. If it's right, I'll make the
> corresponding modifications.
>
> Specifically, I will update the code to set mstatus explicitly.VS to
> "Dirty" to notify the system to save the vector register state,
> similar to how mstatus.FS.
>
> e.g.
> int sbi_misaligned_v_ld/st_emulator() {
> SET_VS_DIRTY(regs)
> ...
> }
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