[PATCH v4 7/7] lib: sbi: add Smdbltrp ISA extension support

[Samuel Holland]

On 2024-10-18 3:40 AM, Clément Léger wrote:
> Add support for the Smdbltrp[1] ISA extension. First thing to do is
> clearing MDT on entry after setting the first MTVEC (since MDT is
> reset to 1). Additionally, during trap handling, clear MDT once all
> critical CSRs have been saved and in return path, restore MSTATUS/H
> before restoring MEPC to avoid taking another trap which would clobber
> it.
> 
> Link: https://github.com/riscv/riscv-double-trap/releases/download/v0.56/riscv-double-trap.pdf [1]
> Signed-off-by: Clément Léger <cleger at rivosinc.com>
> ---
>  firmware/fw_base.S           | 37 +++++++++++++++++++++++++++++++-----
>  include/sbi/riscv_encoding.h |  4 +++-
>  2 files changed, 35 insertions(+), 6 deletions(-)

Reviewed-by: Samuel Holland <samuel.holland at sifive.com>